Internet Data Sheet
HYS[64/72]D[32/64/128]xxx[G/H]U–[5/6]–B
Unbuffered DDR SDRAM Modules
2
Pin Configuration
and
respectively. The pin numbering is depicted in
The pin configuration of the Unbuffered DDR SDRAM DIMM
is listed by function in
(184 pins). The abbreviations
used in columns Pin and Buffer Type are explained in
TABLE 3
Pin Configuration of UDIMM
Pin#
Name
Pin
Type
I
NC
I
I
I
NC
I
I
I
I
NC
I
I
NC
I
I
I
Buffer
Type
SSTL
–
SSTL
SSTL
SSTL
–
SSTL
SSTL
SSTL
SSTL
–
SSTL
SSTL
–
SSTL
SSTL
SSTL
Clock Enable Rank 0
Clock Enable Rank 1
Note: 2-rank module
Note: 1-rank module
Chip Select Rank 0
Chip Select Rank 1
Note: 2-rank module
Note: 1-rank module
Row Address Strobe
Column Address Strobe
Write Enable
Complement Clock Signals 2:0
Function
Clock Signals
137
16
76
138
17
75
21
111
CK0
NC
CK1
CK2
CK0
NC
CK1
CK2
CKE0
CKE1
NC
Control Signals
157
158
S0
S1
NC
154
65
63
RAS
CAS
WE
Clock Signals 2:0
Rev. 1.22, 2007-01
03292006-CXBY-V2JX
5
QIMONDA [ QIMONDA AG ]
