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HYS72T64300HP-3S-A 参数 Datasheet PDF下载

HYS72T64300HP-3S-A图片预览
型号: HYS72T64300HP-3S-A
PDF下载: 下载PDF文件 查看货源
内容描述: 240引脚注册DDR2 SDRAM模组 [240-Pin Registered DDR2 SDRAM Modules]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 50 页 / 3004 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet
HYS72T[64/128]3x0HP–[3S/3.7/5]–A
Registered DDR2 SDRAM Modules
1
Overview
This chapter gives an overview of the 240-pin Registered DDR2 SDRAM Modules product family and describes its main
characteristics.
1.1
Features
• Average Refresh Period 7.8
µs
at a
T
CASE
lower than 85
°C, 3.9
µs
between 85 °C and 95 °C.
• All inputs and outputs SSTL_18 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die
Termination (ODT)
• Serial Presence Detect with E
2
PROM
• Based on standard reference layouts Raw Card “R”, “T”
and “U”
• RDIMM with parity Dimensions (nominal): 18.30 mm high,
133.35 mm wide
• RoHS compliant products
1)
1) RoHS Compliant Product: Restriction of the use of certain
hazardous substances (RoHS) in electrical and electronic
equipment as defined in the directive 2002/95/EC issued
by the European Parliament and of the Council of 27
January 2003. These substances include mercury, lead,
cadmium, hexavalent chromium, polybrominated
biphenyls and polybrominated biphenyl ethers.
• 240-pin PC2-5300, PC2-4200 and PC2–3200 DDR2
SDRAM memory modules for PC, Workstation and Server
main memory applications
• One rank 64M
×
72, 128M
×
72 and two ranks 128M
×
72
module organization and 64M
×
8, 128M
×
4 chip
organization
• 512 MByte and 1GByte module built with 512-Mbit DDR2
SDRAMs in P-TFBGA-60 chipsize packages.
• Standard Double-Data-Rate-Two Synchronous DRAMs
(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power
supply
• All speed grades faster than DDR2-400 comply with
DDR2-400 timing specifications as well.
• VLP (Very Low Profile) Registered DIMM Parity bit for
address and control bus
• Programmable CAS Latencies (3, 4 & 5), Burst Length (4
& 8) and Burst Type
• Auto Refresh (CBR) and Self Refresh.
• High Temperature Self Refresh is supported.
TABLE 1
Performance Table
Product Type Speed Code
Speed Grade
CAS-RCD-RP latencies
Max. Clock Frequency
@CL5
@CL4
@CL3
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
–3S
PC2–5300
5-5-5
–3.7
PC2–4200
4-4-4
266
266
200
15
15
45
60
–5
PC2–3200
3-3-3
200
200
200
15
15
40
55
Unit
t
CK
MHz
MHz
MHz
ns
ns
ns
ns
f
CK5
f
CK4
f
CK3
t
RCD
t
RP
t
RAS
t
RC
333
266
200
15
15
45
60
Rev. 1.22, 2007-06
07042006-834B-Z31V
3