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LH5496U-35 参数 Datasheet PDF下载

LH5496U-35图片预览
型号: LH5496U-35
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 512 ×9 FIFO [CMOS 512 X 9 FIFO]
分类和应用: 先进先出芯片
文件页数/大小: 16 页 / 144 K
品牌: SHARP [ SHARP ELECTRIONIC COMPONENTS ]
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LH5496/96H
CMOS 512
×
9 FIFO
TIMING DIAGRAMS (cont’d)
W
t
WEF
EF
t
RPE
R
NOTES:
1. t
RPE
= t
RPW
2. t
RPE
: Effective Read Pulse Width after Empty Flag HIGH.
3. The Data Out pins (D
0
- D
8
) are forced into a
high-impedance state whenever EF = LOW.
5496-10
Figure 11. Empty Flag Timing
R
t
RFF
FF
t
WPF
W
NOTES:
1. t
WPF
= t
WPW
2. t
WPF
: Effective Write Pulse Width after Full Flag HIGH.
5496-11
Figure 12. Full Flag Timing
HALF-FULL
OR LESS
W
MORE THAN
HALF-FULL
HALF-FULL
OR LESS
R
t
WHF
t
RHF
HF
5496-12
10