LH5496/96H
CMOS 512 × 9 FIFO
LH5496/96H devices in parallel but opposite directions.
The Data In pins of a device may be tied to the corre-
spondingData Outpinsofanotherdevice operatingin the
opposite direction to form a single bidirectional bus inter-
face. Care must be taken to assure that the appropriate
read, write, and flag signals are routed to each system.
Both depth and width expansion may be used in this
configuration.
OPERATIONAL MODES (cont’d)
Compound Expansion
A combination of width and depth expansion can be
easily implemented by operating groups of depth
expanded FIFOs in parallel.
Bidirectional Operation
Applications which require bidirectional data buffering
between two systems can be realized by operating
Q0 - Q8
Q0 - Q17
Q0 - QN-10
Q0 - QN-1
DATA OUT
R
LH5496/96H
DEPTH EXPANSION
BLOCK
LH5496/96H
DEPTH EXPANSION
BLOCK
LH5496/96H
DEPTH EXPANSION
BLOCK
W
RS
DATA IN
D9 - DN-1
D18 - DN-1
DN-9 - DN-1
D0 - DN-1
5496-20
Figure 20. Compound FIFO Expansion
Wa
Rb
EFb
FFa
LH5496/96H
HFb
RTb
RS
Da0 - 8
Qb0 - 8
XI
SYSTEM A
SYSTEM B
Qa0 - 8
Db0 - 8
Ra
Wb
LH5496/96H
EFa
FFb
HFa
RTa
RS
XI
5496-21
Figure 21. Bidirectional FIFO Buffer
14
SHARP [ SHARP ELECTRIONIC COMPONENTS ]
