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AOD476 参数 Datasheet PDF下载

AOD476图片预览
型号: AOD476
PDF下载: 下载PDF文件 查看货源
内容描述: N沟道增强型网络场效晶体管 [N-Channel Enhancement Mode Field Effect Transistor]
分类和应用: 晶体晶体管
文件页数/大小: 6 页 / 517 K
品牌: SHENZHENFREESCALE [ ShenZhen FreesCale Electronics. Co., Ltd ]
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AOD476
N-Channel Enhancement Mode Field
Effect Transistor
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BV
DSS
Drain-Source Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
I
D(ON)
Zero Gate Voltage Drain Current
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
Conditions
I
D
=250uA, V
GS
=0V
V
DS
=16V, V
GS
=0V
T
J
=55°C
V
DS
=0V, V
GS
=±16V
V
DS
=V
GS
, I
D
=250µA
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=20A
R
DS(ON)
Static Drain-Source On-Resistance
T
J
=125°C
V
GS
=4.5V, I
D
=10A
V
GS
=2.5V, I
D
=4A
g
FS
V
SD
I
S
Forward Transconductance
Diode Forward Voltage
V
DS
=5V, I
D
=20A
I
S
=1A, V
GS
=0V
G
Min
20
Typ
Max
Units
V
1
5
100
0.6
75
14
21
20
57
19
0.77
1
30
900
28
79
21
1.26
2
uA
nA
V
A
mΩ
S
V
A
pF
pF
pF
1.35
18
9
nC
nC
nC
nC
ns
ns
ns
ns
ns
nC
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
C
iss
Input Capacitance
C
oss
C
rss
R
g
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
V
GS
=0V, V
DS
=10V, f=1MHz
162
105
0.9
15
SWITCHING PARAMETERS
Q
g
(10V) Total Gate Charge
Q
g
(4.5V) Total Gate Charge
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
Body Diode Reverse Recovery Time
I
F
=20A, dI/dt=100A/µs
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=100A/µs
V
GS
=10V, V
DS
=10V, R
L
=0.5Ω,
R
GEN
=3Ω
V
GS
=10V, V
DS
=10V, I
D
=20A
7.2
1.8
2.8
4.5
9.2
18.7
3.3
18
9.5
A: The value of R
θJA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with
0
T
A
=25°C. The Power dissipation P
DSM
is based on R
θJA
and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P
D
is based on T
J(MAX)
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175°C.
D. The R
θJA
is the sum of the thermal impedence from junction to case R
θJC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
µs
pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of T
J(MAX)
=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1
ST
2008).
Rev2: Oct. 2008
2/6
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