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S-8244AAVPH-CEVTFG 参数 Datasheet PDF下载

S-8244AAVPH-CEVTFG图片预览
型号: S-8244AAVPH-CEVTFG
PDF下载: 下载PDF文件 查看货源
内容描述: 电池保护IC 1串4节串联用电池(二级保护) [BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)]
分类和应用: 电池光电二极管
文件页数/大小: 27 页 / 398 K
品牌: SII [ SEIKO INSTRUMENTS INC ]
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BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.3.3
_00
S-8244 Series
Operation
Overcharge Detection
CO is turned to “H” (for CMOS output active “H” or Nch open drain models) or “L” (for CMOS output
active “L” or Pch open drain models) when the voltage of one of the batteries exceeds the overcharge
detection voltage (V
CU
) during charging under normal conditions beyond the overcharge detection
delay time (t
CU
). This state is called “overcharge.”
Attaching FET to the CO pin provides charge
control and a second protection. At that time, the overcharge state is maintained until the voltage of
all batteries decreases from the overcharge detection voltage (V
CU
) by the equivalent to the overcharge
hysteresis voltage (V
CD
).
Delay Circuit
The delay circuit rapidly charges the capacitor connected to the delay capacitor connection pin up to a
specified voltage when the voltage of one of the batteries exceeds the overcharge detection voltage
(V
CU
). Then, the delay circuit gradually discharges the capacitor at 100 nA and inverts the CO output
when the voltage at the delay capacitor connection pin goes below a specified level. Overcharge
detection delay time (t
CU
) varies depending upon the external capacitor.
Each delay time is calculated using the following equation.
t
CU
[s]
=
Delay Coefficient
Min.
(10,
Typ.
15,
Max.
20)
×
C
ICT
[µF]
Because the delay capacitor is rapidly charged, the smaller the capacitance, the larger the difference
between the maximum voltage and the specified value of delay capacitor pin (ICT pin). This will
cause a deviation between the calculated delay time and the resultant delay time. Also, delay time is
internally set in this IC to prevent the CO output from inverting until the charge to delay capacitor pin is
reached to the specified voltage. If large capacitance is used, output may be enabled without delay
time because charge is disabled within the internal delay time.
Please note that the maximum capacitance connected to the delay capacitor pin (ICT pin) is 1
µF.
Seiko Instruments Inc.
11