BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.3.3
_00
S-8244 Series
Test Circuits
(1)
Test Condition 1, Test Circuit 1
Conditions:
•
Set switches 1 and 2 to OFF for CMOS output models.
•
Set switch 1 to ON and switch 2 to OFF for Nch open drain models.
•
Set switch 1 to OFF and switch 2 to ON for Pch open drain models.
Definitions:
•
Set V1, V2, V3 and V4 to 3.5 V and gradually increase V1:
Overcharge detection voltage 1 (V
CU1
) is defined as V1 voltage when CO is turned to “H” (for
CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open
drain).
•
Next, gradually decrease V1:
Overcharge hysteresis voltage (V
CD1
) is defined as a difference between V
CU1
and V1 when CO
is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active
“L” or Pch open drain).
(2)
Test Condition 2, Test Circuit 1
Conditions:
•
Set switches 1 and 2 to OFF for CMOS output models.
•
Set switch 1 to ON and switch 2 to OFF for Nch open drain models.
•
Set switch 1 to OFF and switch 2 to ON for Pch open drain models.
Definitions:
•
Set V1, V2, V3 and V4 to 3.5 V and gradually increase V2.
Overcharge detection voltage 2 (V
CU2
) is defined as V2 voltage when CO is turned to “H” (for
CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open
drain).
•
Next, gradually decrease V2.
Overcharge hysteresis voltage (V
CD2
) is defined as a difference between V
CU2
and V2 when CO
is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active
“L” or Pch open drain).
(3)
Test Condition 3, Test Circuit 1
Conditions:
•
Set switches 1 and 2 to OFF for CMOS output models.
•
Set switch 1 to ON and switch 2 to OFF for Nch open drain models.
•
Set switch 1 to OFF and switch 2 to ON for Pch open drain models.
Definitions:
•
Set V1, V2, V3 and V4 to 3.5 V and gradually increase V3.
Overcharge detection voltage 3 (V
CU3
) is defined as V3 voltage when CO is turned to “H” (for
CMOS output active “H” or Nch open drain) or “L” (for CMOS output active “L” or Pch open
drain).
•
Next gradually decrease V3.
Overcharge hysteresis voltage (V
CD3
) is defined as a difference between V
CU3
and V3 when CO
is turned to “L” (for CMOS output active “H” or Nch open drain) or “H” (for CMOS output active
“L” or Pch open drain).
8
Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
