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C8051F827-GS 参数 Datasheet PDF下载

C8051F827-GS图片预览
型号: C8051F827-GS
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 250 页 / 1303 K
品牌: SILABS [ SILICON LABORATORIES ]
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C8051F80x-83x
Table 23.2. Port I/O Assignment for Digital Functions
Digital Function
UART0, SPI0, SMBus,
SYSCLK, PCA0 (CEX0-2
and ECI), T0, or T1.
Any pin used for GPIO
Notes:
Potentially Assignable Port Pins
Any Port pin available for assignment by the
Crossbar. This includes P0.0 - P1.7
2
pins which
have their PnSKIP bit set to 0.
1
P0.0–P2.0
2
SFR(s) used for
Assignment
XBR0, XBR1
PnSKIP
1.
The Crossbar will always assign UART0 pins to P0.4 and P0.5.
2.
Port pins P1.4
–P1.7 are
not available on the 16-pin packages.
23.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions
External digital event capture functions can be used to trigger an interrupt or wake the device from a low
power mode when a transition occurs on a digital I/O pin. The digital event capture functions do not require
dedicated pins and will function on both GPIO pins (PnSKIP = 1) and pins in use by the Crossbar (PnSKIP
= 0). External digital event capture functions cannot be used on pins configured for analog I/O. Table 23.3
shows all available external digital event capture functions.
Table 23.3. Port I/O Assignment for External Digital Event Capture Functions
Digital Function
External Interrupt 0
External Interrupt 1
Port Match
Potentially Assignable Port Pins
P0.0–P0.7
P0.0–P0.7
P0.0–P1.7
*
SFR(s) used for
Assignment
IT01CF
IT01CF
P0MASK, P0MAT
P1MASK, P1MAT
Note:
Port pins P1.4
–P1.7 are
not available on the 16-pin packages.
142
Rev. 1.0