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C8051F827-GS 参数 Datasheet PDF下载

C8051F827-GS图片预览
型号: C8051F827-GS
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 250 页 / 1303 K
品牌: SILICON [ SILICON ]
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C8051F80x-83x  
Port  
P0  
4
P1  
Pin Number 0  
1
2
3
5
6
7
0
1
2
3 41 51 61 71  
0
Special  
Function  
Signals  
TX0  
RX0  
SCK  
MISO  
MOSI  
NSS2  
SDA  
SCL  
CP0  
CP0A  
SYSCLK  
CEX0  
CEX1  
CEX2  
ECI  
T0  
T1  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Pin Skip  
Settings  
P0SKIP  
P1SKIP  
Pins P0.0-P1.71 are capable of being assigned to crossbar peripherals.  
The crossbar peripherals are assigned in priority order from top to bottom,  
according to this diagram.  
These boxes represent Port pins which can potentially be assigned to  
a peripheral.  
Special Function Signals are not assigned by the crossbar. When  
these signals are enabled, the Crossbar should be manually configured to  
skip the corresponding port pins.  
Pins can be “skipped” by setting the corresponding bit in PnSKIP to ‘1’.  
Notes:  
1. P1.4-P1.7 are not available on 16-pin packages.  
2. NSS is only pinned out when the SPI is in 4-wire mode.  
Figure 23.4. Priority Crossbar Decoder Potential Pin Assignments  
144  
Rev. 1.0