U631H64
Nonvolatile Memory Operations
Symbol
Min.
Alt.
t
RESTORE
V
SWITCH
4.0
IEC
650
4.5
μs
V
Max.
Unit
STORE Cycle Inhibit and
No.
Automatic Power Up RECALL
24 Power Up RECALL Duration
k, e
Low Voltage Trigger Level
k:
t
RESTORE
starts from the time V
CC
rises above V
SWITCH
.
STORE Cycle Inhibit and Automatic Up RECALL
V
CC
5.0 V
V
SWITCH
t
STORE inhibit
Power Up
RECALL
(24)
t
RESTORE
Software Mode Selection
A12 - A0
(hex)
0000
1555
0AAA
1FFF
10F0
0F0F
0000
1555
0AAA
1FFF
10F0
0F0E
E
L
W
H
Mode
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
I/O
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Power
Active
Notes
l, m
l, m
l, m
l, m
l, m
l
l, m
l, m
l, m
l, m
l, m
l
I
CC2
Active
L
H
The six consecutive addresses must be in order listed (0000, 1555, 0AAA, 1FFF, 10F0, 0F0F) for a Store cycle or (0000, 1555, 0AAA,
1FFF, 10F0, 0F0E) for a RECALL cycle. W must be high during all six consecutive cycles. See STORE cycle and RECALL cycle tables and
diagrams for further details.
The following six-address sequence is used for testing purposes and should not be used: 0000, 1555, 0AAA, 1FFF, 10F0, 139C.
m: I/O state assumes that G
≤
V
IL
. Activation of nonvolatile cycles does not depend on the state of G.
l:
March 31, 2006
STK Control #ML0045
7
Rev 1.0