Multiple RPM-Based PWM Fan Controller
Datasheet
5.8
PWM Divide Registers
Table 5.9 PWM Divide Registers
ADDR
31h
41h
51h
R/W
R/W
R/W
R/W
REGISTER
Fan 1 Divide
Fan 2 Divide
Fan 3 Divide
B7
128
128
128
B6
64
64
64
B5
32
32
32
B4
16
16
16
B3
8
8
8
B2
4
4
4
B1
2
2
2
B0
1
1
1
DEFAULT
01h
01h
01h
The PWM Divide registers determine the final frequency of the respective PWM Fan Driver. Each driver
base frequency is divided by the value of the respective PWM Divide Register to determine the final
frequency. The duty cycle settings are not affected by these settings, only the final frequency of the
PWM driver. A value of 00h will be decoded as 01h.
5.9
Fan Configuration 1 Registers
Table 5.10 Fan Configuration 1 Registers
ADDR
32h
42h
52h
R/W
R/W
R/W
R/W
REGISTER
Fan 1
Configuration 1
Fan 2
Configuration 1
Fan 3
Configuration 1
B7
EN_
ALGO1
EN_
ALGO2
EN_
ALGO3
B6
B5
B4
B3
B2
B1
B0
DEFAULT
2Bh
2Bh
2Bh
RANGE1[1:0]
RANGE2[1:0]
RANGE3[1:0]
EDGES1[1:0]
EDGES2[1:0]
EDGES3[1:0]
UPDATE1[2:0]
UPDATE2[2:0]
UPDATE3[2:0]
The Fan Configuration 1 registers control the general operation of the RPM-based Fan Speed Control
Algorithm used for the respective Fan Driver.
Bit 7 - EN_ALGOx - enables the RPM-based Fan Speed Control Algorithm.
‘0’ - (default) the control circuitry is disabled and the fan driver output is determined by the Fan
Driver Setting Register.
‘1’ - the control circuitry is enabled and the Fan Driver output will be automatically updated to
maintain the programmed fan speed as indicated by the TACH Target Register.
Bits 6- 5 - RANGEx[1:0] - Adjusts the range of reported and programmed tachometer reading values.
The RANGE bits determine the weighting of all TACH values (including the Valid TACH Count, TACH
Target, and TACH reading) as shown in
Table 5.11 Range Decode
RANGEX[1:0]
1
0
0
0
0
1
REPORTED MINIMUM
RPM
500
1000 (default)
TACH COUNT
MULTIPLIER
1
2
SMSC EMC2303
33
Revision 1.1 (10-12-09)
DATASHEET
SMSC [ SMSC CORPORATION ]
