USB 2.0 to 10/100 Ethernet Controller
Datasheet
Table 3.1 MII Interface Pins (continued)
BUFFER
TYPE
O8
(PD)
NUM PINS
NAME
Transmit Data
0
(External
PHY Mode)
General
Purpose I/O 4
(Internal PHY
Mode Only)
SYMBOL
TXD0
DESCRIPTION
In external PHY mode, this pin functions as the
transmit data 0 output to the external PHY.
GPIO4
IS/O8/
OD8
(PU)
IS
(PD)
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This strap disables the autoloading of the
EEPROM contents. The assertion of this strap
does not prevent register access to the
EEPROM.
0 = EEPROM is recognized if present.
1 = EEPROM is not recognized even if it is
present.
See
for more information on
configuration straps.
1
EEPROM
Disable
Configuration
Strap
EEP_DISABLE
1
Transmit
Clock
(External
PHY Mode)
Note 3.1
TXCLK
IS
(PU)
In external PHY mode, this pin is the transmitter
clock input from the external PHY. In internal
PHY mode, this pin is not used.
Configuration strap values are latched on power-on reset and system reset. Configuration
straps are identified by an underlined symbol name. Signals that function as configuration
straps must be augmented with an external resistor when connected to a load.
Table 3.2 EEPROM Pins
BUFFER
TYPE
IS
(PD)
O8
(PU)
IS
(PU)
NUM PINS
1
NAME
EEPROM
Data In
EEPROM
Data Out
Auto-MDIX
Enable
Configuration
Strap
SYMBOL
EEDI
EEDO
AUTOMDIX_EN
DESCRIPTION
This pin is driven by the EEDO output of the
external EEPROM.
This pin drives the EEDI input of the external
EEPROM.
Determines the default Auto-MDIX setting.
0 = Auto-MDIX is disabled.
1 = Auto-MDIX is enabled.
See
for more information on
configuration straps.
1
Revision 1.1 (04-18-13)
DATASHEET
16
SMSC LAN950x Family