CXP853P40A
Recommended Operating Conditions
Item
Symbol
V
DD
Supply voltage
Vpp
V
IH
High level
input voltage
V
IHS
V
IHEX
V
IL
Low level
input voltage
Operating temperature
V
ILS
V
ILEX
Topr
Min.
4.5
3.5
2.5
Max.
5.5
5.5
5.5
Unit
V
V
V
V
V
V
V
V
V
V
°C
(Vss = 0V reference)
Remarks
Guaranteed range during operation
Guaranteed range for low speed data
∗
1
Guaranteed data hold operation range during stop
∗
5
I
2
C Schmitt input included
∗
2
CMOS Schmitt input
∗
3
EXTAL pin
∗
4
I
2
C Schmitt input included
∗
2
CMOS Schmitt input
∗
3
EXTAL pin
∗
4
Vpp = V
DD
0.7V
DD
0.8V
DD
V
DD
– 0.4
0
0
–0.3
–10
V
DD
V
DD
V
DD
+ 0.3
0.3V
DD
0.2V
DD
0.4
+75
∗
1
Rating for 1/16 frequency mode and sleep mode.
∗
2
Normal input port (All pins of PA, PB, PC, PE2 to PE5), PF4 to PF7 pins.
∗
3
Includes PD0/INT2, PD1/SCK, PD2, PD3/SI, PD4/HSI, PD5/ACI, PD6/RMC, PD7/EC, PE0/INT0, PE1/INT1,
HSYNC, VSYNC, RST pins.
∗
4
It specifies only when the external clock is input.
∗
5
Vpp and V
DD
should be set to the same voltage.
– 12 –
SONY [ SONY CORPORATION ]
