CXP853P40A
AC Characteristics
(1) Clock timing
(Ta = –10 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference)
Item
Symbol
Pin
Condition
Fig. 1, Fig. 2
Min.
Max.
4.5
9
Unit
2
3.5
7
XTAL
EXTAL
System clock frequency
fC
MHz
3
2
100
50
t
XL,
XH
Fig. 1, Fig. 2
External clock drive
System clock input
pulse width
ns
EXTAL
t
3
System clock
rise and fall times
t
CR,
CF
Fig 1, Fig 2
External clock drive
ns
ns
200
20
EXTAL
EC
t
Event counter input
clock pulse widtth
t
EH,
EL
1
tsys + 50
Fig. 3
Fig. 3
t
Event counter input clock
rise and fall times
t
ER,
EF
ms
EC
t
1
tsys indicates one of three values according to the contents of the clock control register (address : 00FEH)
upper 2 bits (CPU clock selection)
tsys [ns] = 2000/fc (Upper 2 bits = "00"), 4000/fc (Upper 2 bits = "01"), 16000/fc (Upper 2 bits = "11")
Oscillator clock 4MHz version
2
3
Oscillator clock 8MHz version
1/fc
VDD – 0.4V
EXTAL
0.4V
tXH
tCF
tXL
tCR
Fig. 1. Clock timing
Crystal oscillator
Ceramic oscillator
External clock
EXTAL
XTAL
EXTAL
XTAL
C1
C2
OPEN
Fig. 2. Clock applied condition
0.8VDD
0.2VDD
EC
tEH
tEF
tEL
tER
Fig. 3. Event count clock timing
– 14 –
SONY [ SONY CORPORATION ]
