D at a
S hee t
(Adva nce
In for m ation)
Table 12.2
S29GL-P Sector Protection Command Definitions, x16
Cycles
Bus Cycles (Notes
First/Seventh
Addr
555
XXX
77h
XXX
555
XXX
00
00
Password Unlock
Command Set Exit (7,
PPB Command Set Entry
Global
Non-Volatile
PPB Program (11,
All PPB Erase
PPB Status Read
PPB Command Set Exit (7,
Global Non-
Volatile Freeze
PPB Lock Command Set Entry
PPB Lock Set
PPB Lock Status Read
PPB Lock Command Set Exit (7,
DYB Command Set Entry
Volatile
DYB Set (11,
DYB Clear
DYB Status Read
DYB Command Set Exit (7,
7
00
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
XXX
555
XXX
XXX
SA
XXX
555
XXX
XXX
XXX
555
XXX
XXX
SA
XXX
29
90
AA
A0
80
RD (0)
90
AA
A0
RD (0)
90
AA
A0
A0
RD (0)
90
XXX
00
XXX
2AA
SA
SA
00
55
00
01
555
E0
XXX
2AA
XXX
00
55
00
555
50
XXX
2AA
SA
00
00
55
00
30
555
C0
Data
AA
A0
DATA
90
AA
A0
PWD0
25
XXX
2AA
PWA x
01
00
00
55
PWD x
PWD 1
03
02
00
PWD
2
PWD
0
03
01
PWD 3
PWD 1
02
PWD
2
03
PWD 3
555
60
Second
Addr
2AA
XXX
Data
55
DATA
Third
Addr
555
Data
40
Fourth
Addr
Data
Fifth
Addr
Data
Sixth
Addr
Data
Command (Notes)
Command Set Entry
Lock
Register
Program
Read
Command Set Exit (7,
Command Set Entry
Password Program
Password
Protection
Password Read
3
2
1
2
3
2
4
Legend
X = Don’t care
RD(0) = Read data.
SA = Sector Address. Address bits A
max
–A16 uniquely select any sector.
PWD = Password
PWD
x
= Password word0, word1, word2, and word3.
Data = Lock Register Contents: PD(0) = Secured Silicon Sector Protection Bit, PD(1) = Persistent Protection Mode Lock Bit, PD(2) = Password Protection Mode
Lock Bit.
Notes
1. See
for description of bus operations.
2. All values are in hexadecimal.
3. All bus cycles are write cycles unless otherwise noted.
4. Data bits DQ15-DQ8 are don’t cares for unlock and command cycles.
5. Address bits A
MAX
:A16 are don’t cares for unlock and command cycles, unless SA or PA required. (A
MAX
is the Highest Address pin.)
6. All Lock Register bits are one-time programmable. Program state = “0” and the erase state = “1.” The Persistent Protection Mode Lock Bit and the Password
Protection Mode Lock Bit cannot be programmed at the same time or the Lock Register Bits Program operation aborts and returns the device to read mode. Lock
Register bits that are reserved for future use default to “1’s.” The Lock Register is shipped out as “FFFF’s” before Lock Register Bit program execution.
7. The Exit command returns the device to reading the array.
8. If any Command Set Entry command was written, an Exit command must be issued to reset the device into read mode.
9. For PWDx, only one portion of the password can be programmed per each “A0” command.
10. Note that the password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
11. If ACC = V
HH
, sector protection matches when ACC = V
IH
.
12. Protected State = “00h,” Unprotected State = “01h.”
13. The All PPB Erase command embeds programming of all PPB bits before erasure.
November 21, 2006 S29GL-P_00_A3
S29GL-P MirrorBit
TM
Flash Family
63
SPANSION [ SPANSION ]
