CY28419
Byte 0: Control Register 0
Bit
7
6
5
4
3
2
1
0
@Pup
0
1
0
0
1
1
Externally
Selected
Externally
Selected
Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
FS_B
FS_A
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
FS_B reflects the value of the FS_B pin sampled on power-up.
0 = FS_B low at power-up
FS_A reflects the value of the FS_A pin sampled on power-up.
0 = FS_A low at power-up
Description
Byte 1: Control Register 1
Bit
7
6
5
4
3
2
1
0
@Pup
0
1
1
1
1
1
1
1
Name
SRCT, SRCC
SRCT, SRCC
Reserved
Reserved
Reserved
CPUT2, CPUC2
CPUT1, CPUC1
CPUT0, CPUC0
Description
Allow control of SRCT/C with assertion of PCI_STP#
0 = Free Running, 1 = Stopped with PCI_STP#
SRCT/C Output Enable
0 = Disabled (three-state), 1 = Enabled
Reserved
Reserved
Reserved
CPUT/C2 Output Enable
0 = Disabled (three-state), 1 = Enabled
CPUT/C1 Output Enable,
0 = Disabled (three-state), 1 = Enabled
CPUT/C0 Output Enable
0 = Disabled (three-state), 1 = Enabled
Byte 2: Control Register 2
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Name
SRCT, SRCC
SRCT, SRCC
CPUT2, CPUC2
CPUT1, CPUC1
CPUT0, CPUC0
Reserved
Reserved
Reserved
Description
SRCT/C Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
SRCT/C Stop drive mode
0 = Driven in PCI_STP, 1 = Three-state in power-down
CPUT/C2 Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
CPUT/C1 Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
CPUT/C0 Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
Reserved
Reserved
Reserved
Rev 1.0, November 22, 2006
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