CY28419
Byte 3: Control Register 3
Bit @Pup
Name
7
1
All PCI and SRC Clock outputs
except PCIF and SRC clocks
set to free-running
6
1
PCI6
5
4
3
2
1
0
1
1
1
1
1
1
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Description
PCI_STP Control. 0 = SW PCI_STP not enabled and only the PCI_STP# pin will
stop the PCI stop enabled outputs, 1 = the PCI_STP function is enabled and the
stop enabled outputs will be stopped in a synchronous manner with no short pulses.
PCI6 Output Enable
0 = Disabled, 1 = Enabled
PCI5 Output Enable
0 = Disabled, 1 = Enabled
PCI4 Output Enable
0 = Disabled, 1 = Enabled
PCI3 Output Enable
0 = Disabled, 1 = Enabled
PCI2 Output Enable
0 = Disabled, 1 = Enabled
PCI1 Output Enable
0 = Disabled, 1 = Enabled
PCI0 Output Enable
0 = Disabled, 1 = Enabled
Description
USB_48 Drive Strength
0 = High drive strength, 1 = Normal drive strength
USB_48 Output Enable
0 = Disabled, 1 = Enabled
Allow control of PCIF2 with assertion of PCI_STP#
0 = Free Running, 1 = Stopped with PCI_STP#
Allow control of PCIF1 with assertion of PCI_STP#
0 = Free Running, 1 = Stopped with PCI_STP#
Allow control of PCIF0 with assertion of PCI_STP#
0 = Free Running, 1 = Stopped with PCI_STP#
PCIF2 Output Enable
0 = Disabled, 1 = Enabled
PCIF1 Output Enable
0 = Disabled, 1 = Enabled
PCIF0 Output Enable
0 = Disabled, 1 = Enabled
Description
DOT_48 Output Enable
0 = Disabled, 1 = Enabled
0 = three-state, 1 = Enabled
VCH Select 66 MHz/48 MHz
0 = 3V66 mode, 1 = VCH (48MHz) mode
3V66_4/VCH Output Enable
0 = Disabled, 1 = Enabled
3V66_3 Output Enable
0 = Disabled, 1 = Enabled
3V66_2 Output Enable
0 = Disabled, 1 = Enabled
3V66_1 Output Enable
0 = Disabled, 1 = Enabled
3V66_0 Output Enable
0 = Disabled, 1 = Enabled
Byte 4: Control Register 4
Bit
7
6
5
4
3
2
1
0
@Pup
0
1
0
0
0
1
1
1
Name
USB_ 48MHz
USB_ 48MHz
PCIF2
PCIF1
PCIF0
PCIF2
PCIF1
PCIF0
Byte 5: Control Register 5
Bit
7
6
5
4
3
2
1
0
@Pup
1
1
0
1
1
1
1
1
DOT_48
CPUT3, CPUC3
3V66_4/VCH
3V66_4/VCH
3V66_3
3V66_2
3V66_1
3V66_0
Name
Rev 1.0, November 22, 2006
Page 6 of 15
SPECTRALINEAR [ SPECTRALINEAR INC ]
