CY28443-3
Byte 11: Control Register 11
Bit
7
6
5
4
3
2
1
0
@Pup
0
HW
HW
HW
0
0
0
HW
Name
RESERVED
RESERVED
RESERVED
RESERVED
27MHz
RESERVED
RESERVED
RESERVED
RESERVED Set = 0
RESERVED
RESERVED
RESERVED
27MHz (spread and non-spread) Output Drive Strength
0 = Low, 1 = High
RESERVED Set = 0
RESERVED Set = 0
RESERVED
Description
Byte 12: Control Register 12
Bit
7
6
5
4
3
2
1
0
@Pup
0
1
1
1
1
1
1
1
Name
CLKREQ#A
CLKREQ#B
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
CLKREQ#A Enable
0 = Disable 1 = Enable
CLKREQ#B Enable
0 = Disable 1 = Enable
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Description
Byte 13: Control Register 13
Bit
7
6
5
4
3
2
1
0
@Pup
1
1
1
1
1
1
1
1
Name
RESERVED
96/100M Clock Speed
RESERVED
RESERVED
PCI5
PCI4
PCI3
PCI2
RESERVED
96/100 SRC Clock Speed
0 = 96MHz 1 = 100MHz
RESERVED, Set = 1
RESERVED, Set = 1
PCI5 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
PCI4 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
PCI3 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
PCI2 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
Description
Byte 14: Control Register 14
Bit
7
6
5
4
@Pup
1
0
0
0
Name
RESERVED
RESERVED
RESERVED
CLKREQ#A
RESEREVD
RESERVED
RESERVED
SRC[T/C]5 Control
0 = SRC[T/C]5 not stoppable by CLKREQ#A
1 = SRC[T/C]5 stoppable by CLKREQ#A
Description
Rev 1.0, November 20, 2006
Page 9 of 23
SPECTRALINEAR [ SPECTRALINEAR INC ]
