SL23EP08
Pin Configuration
16-Pin SOIC/TSSOP
Pin Description
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
CLKIN
CLKA1
CLKA2
VDD
GND
CLKB1
CLKB2
S2
S1
CLKB3
CLKB4
GND
VDD
CLKA3
CLKA4
FBK
Pin Type
Input
Output
Output
Power
Power
Output
Output
Input
Input
Output
Output
Power
Power
Output
Output
Output
Pin Description
Reference Frequency Clock Input. 5V tolerant input. Weak pull-down
(250k ).
Buffered Clock Output, Bank A. Weak pull-down (250k ).
Buffered Clock Output, Bank A. Weak pull-down (250k ).
3.3V to 2.5V Power Supply.
Power Ground.
Buffered Clock Output, Bank B. Weak pull-down (250k ).
Buffered Clock Output, Bank B. Weak pull-down (250k ).
Select Input, select pin S2. Weak pull-up (250k ).
Select Input, select pin S1. Weak pull-up (250k ).
Buffered Clock Output, Bank B. Weak pull-down (250k ).
Buffered Clock Output, Bank B. Weak pull-down (250k ).
Power Ground.
3.3V to 2.5V Power Supply.
Buffered Clock Output, Bank A. Weak pull-down (250k ).
Buffered Clock Output, Bank A. Weak pull-down (250k ).
PLL Feedback input.
Rev 1.4, May 28, 2007
Page 2 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
