256 Kbit / 512 Kbit / 1 Mbit / 2 Mbit Multi-Purpose Flash
SST27SF256 / SST27SF512 / SST27SF010 / SST27SF020
Data Sheet
TABLE 10: R
ECOMMENDED
S
YSTEM
P
OWER
-
UP
T
IMINGS
Symbol
T
PU-READ
1
Parameter
Power-up to Read Operation
Power-up to Write Operation
Minimum
100
100
Units
µs
µs
T10.1 502
T
PU-WRITE1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 11: C
APACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
Parameter
C
I/O1
C
IN
1
Description
I/O Pin Capacitance
Input Capacitance
Test Condition
V
I/O
= 0V
V
IN
= 0V
Maximum
12 pF
6 pF
T11.0 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: R
ELIABILITY
C
HARACTERISTICS
Symbol
N
END
T
DR1
I
LTH1
1
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
1000
100
100
Units
Cycles
Years
mA
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
T12.2 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
AC CHARACTERISTICS
TABLE 13: R
EAD
C
YCLE
T
IMING
P
ARAMETERS
V
DD
= 5.0V±10%
(Ta = 0°C to +70°C (Commercial))
SST27SF256-70
SST27SF512-70
SST27SF010-70
SST27SF020-70
Symbol
T
RC
T
CE
T
AA
T
OE
T
CLZ1
T
OLZ1
T
CHZ1
T
OHZ1
T
OH1
Parameter
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
0
0
0
25
25
0
Min
70
70
70
35
0
0
30
30
Max
SST27SF256-90
SST27SF512-90
SST27SF010-90
SST27SF020-90
Min
90
90
90
45
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
T13.1 502
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71152-02-000 5/01
502
10
SST [ SILICON STORAGE TECHNOLOGY, INC ]
