2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
T
T
AA
RC
ADDRESS A
MS-0
CE#
OE#
WE#
T
CE
T
OE
T
OHZ
T
OLZ
V
IH
T
T
CHZ
T
CLZ
OH
HIGH-Z
HIGH-Z
DQ
15-0
DATA VALID
DATA VALID
Note:
A
MS
A
MS
= Most significant address
= A for SST39LF/VF200A, A for SST39LF/VF400A and A for SST39LF/VF800A
16
17
18
1117 F03.2
FIGURE 5: Read Cycle Timing Diagram
INTERNAL PROGRAM OPERATION STARTS
T
BP
5555
2AAA
5555
ADDR
ADDRESS A
MS-0
T
AH
T
DH
T
WP
WE#
T
T
WPH
DS
T
AS
OE#
CE#
T
CH
T
CS
DQ
15-0
XXAA
SW0
XX55
SW1
XXA0
SW2
DATA
WORD
(ADDR/DATA)
Note:
A
A
= Most significant address
MS
MS
= A for SST39LF/VF200A, A for SST39LF/VF400A and A for SST39LF/VF800A
16 17 18
X can be V or V , but no other value.
IL IH
1117 F04.4
FIGURE 6: WE# Controlled Program Cycle Timing Diagram
©2007 Silicon Storage Technology, Inc.
S71117-09-000
2/07
15
SST [ SILICON STORAGE TECHNOLOGY, INC ]
