Memory and register map
Memory area
STM8S105xx
Table 7: Flash, Data EEPROM and RAM boundary addresses
Size (bytes)
Start address
End address
Flash program memory 32K
0x00 8000
0x00 FFFF
0x00 BFFF
0x00 07FF
0x00 43FF
16K
2K
0x00 8000
0x00 0000
0x00 4000
RAM
Data EEPROM
1024
6.2
Register map
6.2.1
I/O port hardware register map
Table 8: I/O port hardware register map
Register label Register name
Address
Block
Reset
status
0x00 5000 Port A
0x00 5001
PA_ODR
PA_IDR
PA_DDR
PA_CR1
PA_CR2
PB_ODR
PB_IDR
PB_DDR
PB_CR1
PB_CR2
Port A data output latch register
Port A input pin value register
Port A data direction register
Port A control register 1
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00 5002
0x00 5003
0x00 5004
Port A control register 2
0x00 5005 Port B
0x00 5006
Port B data output latch register
Port B input pin value register
Port B data direction register
Port B control register 1
0x00 5007
0x00 5008
0x00 5009
Port B control register 2
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DocID14771 Rev 9
STMICROELECTRONICS [ ST ]
