TS80C31X2
Table 4. AUXR1: Auxiliary Register 1
7
-
Bit
Number
7
6
-
Bit
Mnemonic
-
5
-
4
-
3
-
Description
2
-
1
-
0
DPS
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Clear to select DPTR0.
Set to select DPTR1.
6
-
5
-
4
-
3
-
2
-
1
-
0
DPS
Reset Value = XXXX XXX0
Not bit addressable
Application
Software can take advantage of the additional data pointers to both increase speed and reduce code size, for
example, block operations (copy, compare, search ...) are well served by using one data pointer as a ’source’
pointer and the other one as a "destination" pointer.
10
Rev. A - Mar. 19, 1999
Preliminary
TEMIC [ TEMIC SEMICONDUCTORS ]
