Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
Table 27: TCON Bit Functions (SFR 0x88)
Function
Bit
Symbol
TF1
TCON[7]
TCON[6]
TCON[5]
TCON[4]
TCON[3]
TCON[2]
Timer 1 overflow flag.
TR1
Not used for interrupt control.
Timer 0 overflow flag.
TF0
TR0
Not used for interrupt control.
External interrupt 1 flag.
IE1
IT1
External interrupt 1 type control bit:
0 = interrupt on low level.
1 = interrupt on falling edge.
TCON[1]
TCON[0]
IE0
IT0
External interrupt 0 flag
External interrupt 0 type control bit:
0 = interrupt on low level.
1 = interrupt on falling edge.
Table 28: The T2CON Bit Functions (SFR 0xC8)
Bit
Symbol
–
Function
T2CON[7]
T2CON[6]
Not used.
I3FR
Polarity control for INT3:
0 = falling edge.
1 = rising edge.
T2CON[5]
I2FR
Polarity control for INT2:
0 = falling edge.
1 = rising edge.
T2CON[4:0]
–
Not used.
Table 29: The IRCON Bit Functions (SFR 0xC0)
Bit
Symbol
Function
–
IRCON[7]
Not used
–
IRCON[6]
Not used
IRCON[5]
IRCON[4]
IRCON[3]
IRCON[2]
IRCON[1]
IRCON[0]
IEX6
IEX5
IEX4
IEX3
IEX2
–
1 = External interrupt 6 occurred and has not been cleared.
1 = External interrupt 5 occurred and has not been cleared.
1 = External interrupt 4 occurred and has not been cleared.
1 = External interrupt 3 occurred and has not been cleared.
1 = External interrupt 2 occurred and has not been cleared.
Not used.
TF0 and TF1 (Timer 0 and Timer 1 overflow flags) will be automatically cleared by hardware when
the service routine is called (Signals T0ACK and T1ACK – port ISR – active high when the service
routine is called).
External MPU Interrupts
External interrupts are the interrupts external to the 80515 core, i.e. signals that originate in other parts of
the 71M6531D/F or 71M6532D/F, for example the CE, DIO, RTC, EEPROM interface.
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