Data Sheet 71M6531D/F-71M6532D/F
Name
CKOUT_E
Location
2004[4]
Reset
0
Wake
0
Dir
R/W
FDS 6531/6532 005
Description
Control bit for the SEG19/CKOUT pin:
0: The pin is the SEG19 LCD driver
1: The pin is the CK_FIR output (5 MHz in mission mode, 32 kHz in brownout mode)
Status bit for the V1 comparator (same as V1_OK, see TMUXOUT)
Connects dedicated I/O pins DIO2 and DIO4 through DIO11 as well as input pins PB,
DIO1 and RX to internal resources. If more than one input is connected to the same
resource, the Multiple column in the table below specifies how they are combined.
Resource
Multiple
NONE
–
Reserved
OR
T0 (Counter /Timer 0 clock or gate)
OR
T1 (Counter /Timer 1 clock or gate)
OR
High priority IO interrupt (int0 rising)
OR
Low priority IO interrupt (int1 rising)
OR
High priority IO interrupt (int0 fall-
110
OR
ing)
111
Low priority IO interrupt (int1 falling)
OR
Programs the direction of DIO pins 7 through 1. 1 indicates an output. The bits are
ignored if the pin is not configured as DIO. See
DIO_PV
and
DIO_PW
for special op-
tions for DIO6 and DIO7. See
DIO_EEX
for special options for DIO4 and DIO5.
Programs the direction of DIO pins 15 through 8. 1 indicates an output. The bits are
ignored if the pin is not configured as I/O. See
DIO_PX
and
DIO_PW
for special op-
tions for the DIO8 and DIO9 outputs.
Programs the direction of DIO17.
DIO_Rx[2:0]
000
001
010
011
100
101
The value on the DIO pins. Pins configured as LCD will read zero. When written, changes
data on pins configured as outputs. Pins configured as LCD or input will ignore writes.
DIO_0[7:1]
corresponds to DIO7 through DIO1. PB is read on
DIO_0[0].
DIO_1[7:0]
corresponds to DIO15 through DIO8.
DIO_2[1]
corresponds to DIO17.
DIO_3[5:4]
corresponds to DIO28 and DIO29.
COMP_STAT[0]
DI_RPB[2:0]
DIO_R1[2:0]
DIO_R2[2:0]
DIO_R4[2:0]
DIO_R5[2:0]
DIO_R6[2:0]
DIO_R7[2:0]
DIO_R8[2:0]
DIO_R9[2:0]
DIO_R10[2:0]
DIO_R11[2:0]
DIO_RRX[2:0]
2003[0]
2009[2:0]
2009[6:4]
200A[2:0]
200B[2:0]
200B[6:4]
200C[2:0]
200C[6:4]
200D[2:0]
200D[6:4]
200E[2:0]
200E[6:4]
20AF[2:0]
–
0
0
0
0
0
0
0
0
0
0
0
0
–
0
0
0
0
0
0
0
0
0
0
0
0
R
R/W
DIO_DIR0[7:1]
SFR A2
[7:1]
SFR 91
0
–
R/W
DIO_DIR1[7:0]
0
–
R/W
DIO_DIR2[1]
DIO_0[7:0]
DIO_1[7:0]
DIO_2[1]
DIO_3[5:4]
SFR A1[1]
SFR 80
SFR 90
SFR A0[1]
SFR B0[5:4]
0
0
0
0
0
–
–
–
–
–
R/W
R/W
R/W
R/W
R/W
76
© 2005-2009 TERIDIAN Semiconductor Corporation
v1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
