73S8024RN Data Sheet
DS_8024RN_020
3 Power Supply and Voltage Supervision
The 73S8024RN smart card interface IC incorporates a LDO voltage regulator. The voltage output is
controlled by the digital input 5V/#V. This regulator is able to provide either 3V or 5V card voltage from
the power supply applied on the VPC pin.
Digital circuitry is powered by the power supply applied on the VDD pin. V
DD
also defines the voltage
range to interface with the system controller.
Three voltage supervisors constantly check the presence of the voltages V
DD
, V
PC
and V
CC
. A card
deactivation sequence is forced upon fault of any of these voltage supervisors. The two voltage
supervisors for V
PC
and V
CC
are linked so that a fault is generated to activate a deactivation sequence
when the voltage V
PC
becomes lower than V
CC
. It allows the 73S8024RN to operate at lower V
PC
voltage
when using 3V cards only. The voltage regulator can provide a current of at least 90mA on V
CC
that
comply easily with EMV 4.0 and NDS specifications. The V
PC
voltage supervisor threshold values are
defined from applicable standards (EMV and NDS). A third voltage supervisor monitors the V
DD
voltage.
It is used to initialize the ISO-7816-3 sequencer at power-on, and to deactivate the card at power-off or
upon fault. The voltage threshold of the V
DD
voltage supervisor is internally set by default to 2.3V
nominal. However, it may be desirable, in some applications, to modify this threshold value. The pin
VDDF_ADJ (pin 18 in the SO package, pin 17 in the 32QFN package, not supported in the 20QFN
package) is used to connect an external resistor R
EXT
to ground to raise the V
DD
fault voltage to another
value V
DDF
. The resistor value is defined as follows:
R
EXT
= 56kΩ /(V
DDF
- 2.33)
An alternative method (more accurate) of adjusting the V
DD
fault voltage is to use a resistive network of
R3 from the pin to supply and R1 from the pin to ground (see applications diagram). In order to set the
new threshold voltage, the equivalent resistance must be determined. This resistance value will be
designated Kx. Kx is defined as R1/(R1+R3). Kx is calculated as:
Kx = (2.789 / V
TH
) - 0.6125 where V
TH
is the desired new threshold voltage.
To determine the values of R1 and R3, use the following formulas.
R3 = 24000 / Kx
R1 = R3*(Kx / (1 – Kx))
Taking the example above, where a V
DD
fault threshold voltage of 2.7V is desired, solving for Kx gives:
Kx = (2.789 / 2.7) - 0.6125 = 0.42046.
Solving for R3 gives:
R3 = 24000 / 0.42046 = 57080.
Solving for R1 gives:
R1 = 57080 *(0.42046 / (1 – 0.42046)) = 41412.
Using standard 1 % resistor values gives R3 = 57.6KΩ and R1 = 42.4KΩ.
These values give an equivalent resistance of Kx = 0.4228, a 0.6% error.
If the 2.3V default threshold is used, this pin must be left unconnected. The 20QFN package has the V
DD
fault threshold fixed at this default value.
8
Rev. 1.8
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
