78M6612-IM/F 参数 Datasheet PDF下载

78M6612 Data Sheet

DS_6612_001

1.5.10 EEPROM Interface

The 78M6612 provides hardware support for a two-pin or a three-pin EEPROM interface. The EEPROM

interface uses the

EECTRL

and

EEDATA

registers for communication.

1.5.10.1 Two-Pin EEPROM Interface

The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is

multiplexed onto pins DIO4 (SCK) and DIO5 (SDA) controlled by the I/O RAM bits

DIO_EEX[1:0]

(see

the I/O RAM Table). Set

DIO_EEX[1:0]

= 01 to select the two-wire EEPROM interface. The MPU

communicates with the interface through two SFR registers:

EEDATA

and

EECTRL.

If the MPU wishes to

write a byte of data to EEPROM, it places the data in

EEDATA

and then writes the ‘Transmit’ command

(CMD = 0011) to

EECTRL.

This initiates the transmit operation. The transmit operation is finished when

the

BUSY

bit falls. Interrupt INT5 is also asserted when

BUSY

falls. The MPU can then check the

RX_ACK

bit to see if the EEPROM acknowledged the transmission.

A byte is read by writing the Receive command (CMD[3:0] = 0001) to

EECTRL

and waiting for the

BUSY

bit to fall. Upon completion, the received data is in

EEDATA.

The serial transmit and receive clock is 78

kHz during each transmission, and the clock is held in a high state until the next transmission. The bits

in

EECTRL

are shown in

The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly

(“bit-banging”).

However, controlling DIO4 and DIO5 directly is discouraged, because it may tie

up the MPU to the point where it may become too busy to process interrupts.

Table 41:

EECTRL

Status Bits

Status

Bit

7

6

5

4

Name

ERROR

BUSY

RX_ACK

TX_ACK

Read

/

Write

R

R

R

R

Reset

State

0

0

1

1

Polarity

Positive

Positive

Negative

Negative

Description

1 when an illegal command is received.

1 when serial data bus is busy.

0 indicates that the EEPROM sent an ACK bit.

0 indicates when an ACK bit has been sent to

the EEPROM.

CMD

0000

Operation

No-op. Applying the no-op

command will stop the I

2

C clock

(SCK, DIO4). Failure to issue the

no-op command will keep the SCK

signal toggling.

Receive a byte from EEPROM and

send ACK.

Transmit a byte to EEPROM.

Issue a ‘STOP’ sequence.

Receive the last byte from

EEPROM, do not send ACK.

Issue a ‘START’ sequence.

No Operation, set the

ERROR

bit.

3-0

CMD[3:0]

W

0

Positive,

see

CMD

Table

0001

0011

0101

0110

1001

Others

46

Rev. 1.2