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A0-A15
MODE
ADV
CLK
TE
CH
T35L6432B
FUNCTIONAL BLOCK DIAGRAM
16
ADDRESS
REGISTER
16
14
16
A0
A1
Q1
BINARY
COUNTER
& LOGIC
Q0
A1'
A0'
ADSC
ADSP
CLR
BWE
BYTE 4
WRITE REGISTER
BW4
8
BYTE 4
WRITE DRIVER
8
8
BYTE 3
WRITE REGISTER
BW3
8
BYTE 2
WRITE REGISTER
BW2
8
BYTE 1
WRITE REGISTER
BW1
GW
ENABLE
REGISTER
BYTE 1
WRITE DRIVER
BYTE 2
WRITE DRIVER
BYTE 3
WRITE DRIVER
8
32
64K x 8 x 4
MEMORY
ARRAY
8
SENSE
AMPS
32
32
OUTPUT
BUFFERS
DQ1
.
.
.
DQ32
8
INPUT
REGISTERS
CE
CE2
CE2
4
OE
Note:
The Functional Block Diagram illustrates simplified device operation. See Truth Table,
pin descriptions and timing diagrams for detailed information.
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
P. 2
Publication Date: JUL. 2002
Revision: A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
