VITESSE
SEMICONDUCTOR CORPORATION
1.0625 Gbits/sec Fibre
Channel Transceiver
Figure 5: Receive Timing Waveforms
Datasheet
VSC7126
T
3
RBC(0)
T
SKEW
RBC(1)
T
1
T
2
Data Valid
R0:19 &
COM_DET
LUNUSE
Data Valid
Data Valid
Table 2: Receive AC Characteristics
Parameters
T
1
T
2
Description
Data or COM_DET Valid
prior to RBC(0) fall
Data or COM_DET Valid
after RBC(0) fall
Deviation of RBC(0) falling
edge to falling edge delay
from nominal.
R0:19, COM_DET, RBC(0)
rise and fall time
Latency from RX to RBC(0)
falling and RO valid.
Skew between edges of
RBC(0) and RBC(1)
Data acquisition lock time @
1.0625Gb/s
Min.
4
6.0
Max.
—
—
Units
ns.
ns.
Conditions
Measured between the 1.4V
point of RBC(0) and a valid
level of R0:19 or
COM_DET. All outputs
driving 10pF load.
Nominal delay is 20 bit
times.
Tested on sample basis
Between V
il(max)
and
V
ih(min)
, into 10 pf. load.
bc = bit clock periods
T
4
T
R
, T
F
R
lat
T
SKEW
T
LOCK
-500
0.7
40 bc + 10 ns
----
—
500
2.4
59 bc + 10 ns
1.5
2.4
ps.
ns.
Bit
Clocks
ns
µ
s.
8B/10B IDLE pattern.
Tested on a sample basis
NOTE: Probability of Recovery for data acquisition is 95% per section 5.3 of the FC-PH rev 4.3.
Page 6
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52148-0, Rev. 4.3
3/4/99
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
