欢迎访问ic37.com |
会员登录 免费注册
发布采购

WED3DL3216V10BI 参数 Datasheet PDF下载

WED3DL3216V10BI图片预览
型号: WED3DL3216V10BI
PDF下载: 下载PDF文件 查看货源
内容描述: 16Mx32 SDRAM [16Mx32 SDRAM]
分类和应用: 存储动态存储器
文件页数/大小: 27 页 / 804 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
 浏览型号WED3DL3216V10BI的Datasheet PDF文件第3页浏览型号WED3DL3216V10BI的Datasheet PDF文件第4页浏览型号WED3DL3216V10BI的Datasheet PDF文件第5页浏览型号WED3DL3216V10BI的Datasheet PDF文件第6页浏览型号WED3DL3216V10BI的Datasheet PDF文件第8页浏览型号WED3DL3216V10BI的Datasheet PDF文件第9页浏览型号WED3DL3216V10BI的Datasheet PDF文件第10页浏览型号WED3DL3216V10BI的Datasheet PDF文件第11页  
White Electronic Designs
CLOCK ENABLE (CKE0) TRUTH TABLE
CKE
Current State
Previous
Cycle
H
L
L
L
L
L
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
Current
Cycle
X
H
H
H
H
H
L
X
H
H
X
H
H
H
H
H
L
L
L
L
H
X
H
L
H
L
CE#
X
H
L
L
L
L
X
X
H
L
L
H
L
L
L
L
H
L
L
L
L
X
X
X
X
X
RAS#
X
X
H
H
H
L
X
X
X
X
H
X
H
L
L
L
X
H
L
L
L
X
X
X
X
X
Command
CAS#
X
X
H
H
L
X
X
X
X
X
L
X
X
H
L
L
X
X
H
L
L
X
X
X
X
X
WE#
X
X
H
L
X
X
X
X
X
X
L
X
X
X
H
L
X
X
X
H
L
X
X
X
X
X
BA0-1
X
X
X
X
X
X
X
X
X
X
X
A10-11 Action
X
X
X
X
X
X
X
X
X
X
WED3DL3216V
Notes
1
Self Refresh
Power Down
INVALID
Exit Self Refresh with Device Deselect
Exit Self Refresh with No Operation
ILLEGAL
ILLEGAL
ILLEGAL
Maintain Self Refresh
INVALID
Power Down Mode exit, all banks idle
ILLEGAL
Maintain Power Down Mode
Refer to the Idle State section of the
Current State Truth Table
2
1
2
2
2
3
X
X
OP Code
CBR Refresh
Mode Register Set
Refer to the Idle State section of the
Current State Truth Table
4
3
4
4
All Banks Idle
X
X
OP Code
X
X
X
X
X
X
X
X
X
X
Any State
other than
listed above
Entry Self Refresh
Mode Register Set
Power Down
Refer to the Operations in the Current
State Truth Table
Begin Clock Suspend next cycle
Exit Clock Suspend next cycle
Maintain Clock Suspend
5
NOTES:
1.
For the given Current State CKE must be low in the previous cycle.
2.
When CKE has a low to high transition, the clock and other inputs are re-enabled asynchronously. The minimum setup time for CKE (t
CKS
)
must be satisfied before any command other than Exit is issued.
3.
The address inputs (A12-0) depend on the command that is issued. See the Idle State section of the Current State Truth Table for more
information.
4.
The Power Down Mode, Self Refresh Mode, and the Mode Register Set can only be entered from the all banks idle state.
5.
Must be a legal command as defined in the Current State Truth Table.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January, 2004
Rev. 0
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com