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WED3EG7232S-JD3 参数 Datasheet PDF下载

WED3EG7232S-JD3图片预览
型号: WED3EG7232S-JD3
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB - 32Mx72 DDR SDRAM UNBUFFERED [256MB - 32Mx72 DDR SDRAM UNBUFFERED]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 12 页 / 190 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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WED3EG7232S-JD3
PRELIMINARY
I
DD
SPECIFICATIONS AND TEST CONDITIONS
DDR400: V
CC
= V
CCQ
= +2.6V ± 0.1V; DDR333, 266, 200: V
CC
= V
CCQ
= 2.5V ± 0.2V
Includes DDR SDRAM component only
DDR400@
CL=3
Max
DDR333@
CL=2.5
Max
DDR266@
CL=2
Max
DDR266@
CL=2.5
Max
DDR200@
CL=2
Max
Parameter
Operating Current
Symbol Conditions
I
DD0
One device bank; Active - Precharge;
t
RC
=t
RC
(MIN); t
CK
=t
CK
(MIN); DQ,DM
and DQS inputs changing once per
clock cycle; Address and control
inputs changing once every two
cycles.
One device bank; Active-Read-
Precharge Burst = 2; t
RC
=t
RC
(MIN);
t
CK
=t
CK
(MIN); l
OUT
= 0mA; Address
and control inputs changing once per
clock cycle.
All device banks idle; Power-down
mode; t
CK
=t
CK
(MIN); CKE=(low)
CS# = High; All device banks idle;
t
CK
=t
CK
(MIN); CKE = high; Address
and other control inputs changing
once per clock cycle. V
IN
= V
REF
for
DQ, DQS and DM.
One device bank active; Power-
Down mode; t
CK
(MIN); CKE=(low)
CS# = High; CKE = High; One device
bank; Active-Precharge; t
RC
=t
RAS
(MAX); t
CK
=t
CK
(MIN); DQ, DM and
DQS inputs changing twice per clock
cycle; Address and other control
inputs changing once per clock cycle.
Burst = 2; Reads; Continuous burst;
One device bank active; Address
and control inputs changing once
per clock cycle; T
CK
= T
CK
(MIN); l
OUT
= 0mA.
Burst = 2; Writes; Continuous burst;
One device bank active; Address
and control inputs changing once per
clock cycle; t
CK
=t
CK
(MIN); DQ,DM
and DQS inputs changing once per
clock cycle.
t
RC
= t
RC
(MIN)
CKE
0.2V
Four bank interleaving Reads (BL=4)
with auto precharge with t
RC
=t
RC
(MIN); t
CK
=t
CK
(MIN); Address and
control inputs change only during
Active Read or Write commands.
Units
1215
1125
1125
1125
1125
mA
Operating Current
I
DD1
1530
1530
1530
1530
1530
mA
Precharge Power-
Down Standby Current
Idle Standby Current
I
DD2P
I
DD2F
36
36
36
36
36
rnA
540
450
450
450
450
mA
Active Power-Down
Standby Current
Active Standby Current
I
DD3P
I
DD3N
360
270
270
270
270
mA
630
540
540
540
540
mA
Operating Current
I
DD4R
1800
1575
1575
1575
1575
mA
Operating Current
I
DD4W
1755
1575
1575
1575
1575
rnA
Auto Refresh Current
Self Refresh Current
Operating Current
I
DD5
I
DD6
I
DD7A
2340
36
4230
2295
36
3690
2295
36
3690
2295
36
3690
2295
36
3690
mA
mA
mA
June 2006
Rev. 6
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com