欢迎访问ic37.com |
会员登录 免费注册
发布采购

WCMA1016U4X-FF70 参数 Datasheet PDF下载

WCMA1016U4X-FF70图片预览
型号: WCMA1016U4X-FF70
PDF下载: 下载PDF文件 查看货源
内容描述: 64K ×16静态RAM [64K x 16 Static RAM]
分类和应用:
文件页数/大小: 11 页 / 309 K
品牌: WEIDA [ WEIDA SEMICONDUCTOR, INC. ]
 浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第1页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第2页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第3页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第5页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第6页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第7页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第8页浏览型号WCMA1016U4X-FF70的Datasheet PDF文件第9页  
WCMA1016U4X
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2
Rise Time:
1 V/ns
V
CC
Typ
GND
10%
ALL INPUT PULSES
90%
90%
10%
Fall Time:
1 V/ns
Equivalent to:
THÉVENIN EQUIVALENT
RTH
OUTPUT
V
Parameters
R1
R2
R
TH
V
TH
3.3V
1213
1378
645
1.75
UNIT
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics
(Over the Operating Range)
Parameter
V
DR
I
CCDR
t
CDR[4]
t
R[5]
Description
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
V
CC
= 2.0V
CE > V
CC
0.3V,
V
IN
> V
CC
0.3V or V
IN
< 0.3V
0
t
RC
Conditions
Min.
2.0
0.5
Typ.
Max.
3.6
15
Unit
V
µA
ns
ns
Data Retention Waveform
DATA RETENTION MODE
V
CC
V
CC(min.)
t
CDR
V
DR
> 2.0 V
V
CC(min.)
t
R
CE or
BHE.BLE
Notes:
5. Full device operation requires linear V
CC
ramp from V
DR
to V
CC(min)
>
100
µs
or stable at V
CC(min)
>
100
µs.
6. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
4