W39V080A
13. LPC INTERFACE MODE AC CHARACTERISTICS
13.1 AC Test Conditions
PARAMETER
CONDITIONS
Input Pulse Levels
Input Rise/Fall Slew Rate
Input/Output Timing Level
Output Load
0.6 V
DD
to 0.2 V
DD
1 V/nS
0.4V
DD
/ 0.4V
DD
1 TTL Gate and C
L
= 10 pF
13.2 Read/Write Cycle Timing Parameters
(V
DD
= 3.3V
±
0.3V, V
SS
= 0V, T
A
= 0 to 70° C)
PARAMETER
SYMBOL
W39V080A
MIN.
MAX.
UNIT
Clock Cycle Time
Input Set Up Time
Input Hold Time
Clock to Data Valid
T
CYC
T
SU
T
HD
T
KQ
30
7
0
2
-
-
-
11
nS
nS
nS
nS
Note:
Minimum and Maximum time have different load. Please refer to PCI specification.
13.3 Reset Timing Parameters
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
V
DD
stable to Reset Active
Clock Stable to Reset Active
Reset Pulse Width
Reset Active to Output Float
Reset Inactive to Input Active
T
PRST
T
KRST
T
RSTP
T
RSTF
T
RST
1
100
100
-
10
-
-
-
-
-
-
-
-
50
-
mS
μS
nS
nS
μS
Note:
All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is input high and
(b) low level signal's reference level is input low.
Please refer to the AC testing condition.
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