W39V080A
Timing Waveforms, for LPC Interface Mode, continued
14.3 Program Cycle Timing Diagram
CLK
#RESET
#LFRAME
1st Start
LAD[3:0]
0000b
Memory
Write
Cycle
011Xb
XXXXb
XXXXb
XXXXb
Address
XXXXb
X101b
0101b
0101b
0101b
1010b
Data
1010b
TAR
1111b
Tri-State
Sync
0000b
1 Clock
TAR
Start next
command
1 Clock
1 Clock
Load Address "5555" in 8 Clocks
Load Data "AA" in 2 Clocks
2 Clocks
1 Clock
Write the 1st command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
Cycle
011Xb
XXXXb
XXXXb
XXXXb
2nd Start
LAD[3:0]
0000b
Address
XXXXb
X010b
1010b
1010b
1010b
0101b
Data
0101b
TAR
1111b
Tri-State
Sync
0000b
1 Clock
TAR
Start next
command
1 Clock
1 Clock
Load Address "2AAA" in 8 Clocks
Load Data "55"
in 2 Clocks
2 Clocks
1 Clock
Write the 2nd command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
Cycle
011Xb
XXXXb
XXXXb
XXXXb
3rd Start
LAD[3:0]
0000b
Address
XXXXb
X101b
0101b
0101b
0101b
Data
0000b
1010b
TAR
1111b
Tri-State
Sync
0000b
1 Clock
TAR
Start next
command
1 Clock
1 Clock
Load Address "5555" in 8 Clocks
Load Data "A0"
in 2 Clocks
2 Clocks
1 Clock
Write the 3rd command to the device in LPC mode.
CLK
#RESET
#LFRAME
Memory
Write
Cycle
011Xb
A[31:28]
A[27:24]
A[23:20]
Internal
program start
4th Start
Address
A[19:16]
A[15:12]
A[11:8]
A[7:4]
A[3:0]
D[3:0]
Data
D[7:4]
TAR
1111b
Tri-State
Sync
0000b
1 Clock
TAR
Internal
program start
LAD[3:0]
0000b
1 Clock
1 Clock
Load Ain in 8 Clocks
Load Din in 2 Clocks
2 Clocks
Write the 4th command(target location to be programmed) to the device in LPC mode.
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