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W77C032A40DL 参数 Datasheet PDF下载

W77C032A40DL图片预览
型号: W77C032A40DL
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-BIT MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 78 页 / 547 K
品牌: WINBOND [ WINBOND ]
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W77C32/W77C032A
7.1 External Interrupt Flag
Bit:
7
IE5
Mnemonic: EXIF
6
IE4
5
IE3
4
IE2
3
XT/RG
2
RGMD
1
RGSL
0
BGS
Address: 91h
IE5: External Interrupt 5 flag. Set by hardware when a falling edge is detected on
INT5
.
IE4: External Interrupt 4 flag. Set by hardware when a rising edge is detected on INT4.
IE3: External Interrupt 3 flag. Set by hardware when a falling edge is detected on
INT5
.
IE2: External Interrupt 2 flag. Set by hardware when a rising edge is detected on INT2.
XT/
RG
RG: Crystal/RC Oscillator Select. Setting this bit selects crystal or external clock as system
clock source. Clearing this bit selects the on-chip RC oscillator as clock source.
XTUP(STATUS.4) must be set to 1 and XTOFF (PMR.3) must be cleared before this bit can
be set. Attempts to set this bit without obeying these conditions will be ignored. This bit is set
to 1 after a power-on reset and unchanged by other forms of reset.
RGMD: RC Mode Status. This bit indicates the current clock source of microcontroller. When cleared,
CPU is operating from the external crystal or oscillator. When set, CPU is operating from the
on-chip RC oscillator. This bit is cleared to 0 after a power-on reset and unchanged by other
forms of reset.
RGSL: RC Oscillator Select. This bit selects the clock source following a resume from Power Down
Mode. Setting this bit allows device operating from RC oscillator when a resume from Power
Down Mode. When this bit is cleared, the device will hold operation until the crystal oscillator
has warmed-up following a resume from Power Down Mode. This bit is cleared to 0 after a
power-on reset and unchanged by other forms of reset.
Serial Port Control
Bit:
7
SM0/FE
Mnemonic: SCON
6
SM1
5
SM2
4
REN
3
TB8
2
RB8
1
TI
0
RI
Address: 98h
SM0/FE: Serial port 0, Mode 0 bit or Framing Error Flag: The SMOD0 bit in PCON SFR determines
whether this bit acts as SM0 or as FE. The operation of SM0 is described below. When used
as FE, this bit will be set to indicate an invalid stop bit. This bit must be manually cleared in
software to clear the FE condition.
SM1: Serial port Mode bit 1:
SM0 SM1 Mode Description
0
0
0
Synchronous
0
1
1
Asynchronous
1
0
2
Asynchronous
1
1
3
Asynchronous
Length
8
10
11
11
Baud rate
4/12 Tclk
variable
64/32 Tclk
variable
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