W77C32/W77C032A
P3.7-0: General purpose I/O port. Each pin also has an alternate input or output function. The
alternate functions are described below.
P3.7
RD
Strobe for read from external RAM
P3.6
WR
Strobe for write to external RAM
P3.5 T1
Timer/counter 1 external count input
P3.4 T0
Timer/counter 0 external count input
P3.3
INT1
External interrupt 1
P3.2
INT0
External interrupt 0
P3.1 TxD Serial port 0 output
P3.0 RxD Serial port 0 input
Interrupt Priority
Bit:
7
-
Mnemonic: IP
IP.7:
PS1:
PT2:
PS:
PT1:
PX1:
PT0:
PX0:
This bit is un-implemented and will read high.
This bit defines the Serial port 1 interrupt priority.
This bit defines the Timer 2 interrupt priority.
This bit defines the Serial port 0 interrupt priority.
This bit defines the Timer 1 interrupt priority.
This bit defines the External interrupt 1 priority.
This bit defines the Timer 0 interrupt priority.
This bit defines the External interrupt 0 priority.
6
PS1
5
PT2
4
PS
3
PT1
2
PX1
1
PT0
0
PX0
Address: B8h
PS = 1 sets it to higher priority level.
PT2 = 1 sets it to higher priority level.
PS = 1 sets it to higher priority level.
PT1 = 1 sets it to higher priority level.
PX1 = 1 sets it to higher priority level.
PT0 = 1 sets it to higher priority level.
PX0 = 1 sets it to higher priority level.
Slave Address Mask Enable
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADEN
Address: B9h
SADEN: This register enables the Automatic Address Recognition feature of the Serial port 0. When
a bit in the SADEN is set to 1, the same bit location in SADDR will be compared with the
incoming serial data. When SADEN.n is 0, then the bit becomes a “don’t care” in the
comparison. This register enables the Automatic Address Recognition feature of the Serial
port 0. When all the bits of SADEN are 0, interrupt will occur for any incoming address.
Slave Address Mask Enable 1
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADEN1
Address: Bah
SADEN1:This register enables the Automatic Address Recognition feature of the Serial port 1. When
a bit in the SADEN1 is set to 1, the same bit location in SADDR1 will be compared with the
incoming serial data. When SADEN1.n is 0, then the bit becomes a “don’t care” in the
Publication Release Date: February 1, 2007
Revision A8
- 19 -
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