WM8581
Product Preview
Test Conditions
AVDD, PVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, PGND, DGND = 0V, T
A
= +25
o
C, 1kHz Signal, fs = 48kHz,
24-Bit Data, Slave Mode, MCLK, ADCMCLK = 256fs, 1V
rms
Input Signal Level unless otherwise stated.
PARAMETER
Power Supply Rejection Ratio
SYMBOL
PSRR
TEST CONDITIONS
1kHz 100mV
p-p
20Hz to 20kHz
100mV
p-p
ADC Performance
Full Scale Input Signal Level (for
ADC 0dB Input)
Input resistance
Input capacitance
Signal to Noise Ratio (Note
1,2,4)
SNR
A-weighted,
@ fs = 48kHz
Unweighted,
@ fs = 48kHz
A-weighted,
@ fs = 48kHz, AVDD =
3.3V
A-weighted,
@ fs = 96kHz
Unweighted,
@ fs = 96kHz
A-weighted,
@ fs = 96kHz, AVDD =
3.3V
A-weighted,
@ fs = 192kHz
Unweighted,
@ fs = 192kHz
A-weighted,
@ fs = 192kHz, AVDD
= 3.3V
Total Harmonic Distortion
THD
1kHz, -1dB Full Scale
@ fs = 48kHz
1kHz, -1dB Full Scale
@ fs = 96kHz
1kHz, -1dB Full Scale
@ fs = 192kHz
Dynamic Range
ADC Channel Separation
Channel Level Matching (Note
4)
Channel Phase Deviation
Offset Error
Power Supply Rejection Ratio
PSRR
DNR
-60dB FS
1kHz Input
1KHz Signal
1kHz Signal
HPF On
HPF Off
1kHz 100mVpp
20Hz to 20kHz
100mVpp
Digital Logic Levels (CMOS Levels)
Input LOW level
Input HIGH level
Input leakage current
Input capacitance
Output LOW
Output HIGH
V
OL
V
OH
I
OL
=1mA
I
OH
= -1mA
0.9 x DVDD
V
IL
V
IH
0.7 x DVDD
-1
±0.2
5
0.1 x DVDD
+1
0.3 x DVDD
V
V
µA
pF
V
V
PP Rev 1.0 March 2006
10
1.0 x
VREFP/5
20
10
100
97
97
V
rms
kΩ
pF
dB
dB
dB
MIN
TYP
50
45
MAX
UNIT
dB
dB
97
94
94
dB
dB
dB
97
94
94
dB
dB
dB
-90
-88
-85
100
100
0.1
0.0001
0
100
50
45
dB
dB
dB
dB
dB
Degree
LSB
LSB
dB
dB
w
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