Product Preview
WM8581
Test Conditions
AVDD, PVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, PGND, DGND = 0V, T
A
= +25
o
C, 1kHz Signal, fs = 48kHz,
24-Bit Data, Slave Mode, MCLK, ADCMCLK = 256fs, 1V
rms
Input Signal Level unless otherwise stated.
PARAMETER
Analogue Reference Levels
Reference voltage
Potential divider resistance
S/PDIF Transceiver Performance
Jitter on recovered clock
S/PDIF Input Levels CMOS MODE
Input LOW level
Input HIGH level
Input capacitance
Input Frequency
S/PDIF Input Levels Comparator MODE
Input capacitance
Input resistance
Input frequency
Input Amplitude
PLL
Period Jitter
XTAL
Input XTI LOW level
Input XTI HIGH level
Input XTI capacitance
Input XTI leakage
Output XTO LOW
Output XTO HIGH
Supply Current
Analogue supply current
Analogue supply current
Digital supply current
Power Down
Table 5 Electrical Characteristics
Notes:
1.
2.
Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured ‘A’ weighted.
All performance measurements done with 20kHz low pass filter, and where noted an A-weight filter. Failure to use such a filter
will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The
low pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.
VMID decoupled with 10uF and 0.1uF capacitors (smaller values may result in reduced performance).
AVDD, VREFP = 5V
AVDD, VREFP = 3.3V
DVDD = 3.3V
45
30
16
10
mA
mA
mA
µA
VX
IL
VX
IH
C
XJ
IX
leak
VX
OL
VX
OH
15pF load capacitors
15pF load capacitors
0
853
3.32
28.92
86
1.458
4.491
38.96
278
1.942
557
mV
mV
pF
mA
mV
V
80
ps(rms)
200
1.31
18
25
0.5 X DVDD
pF
Ω
MHz
mV
V
IL
V
IH
0.7 X DVDD
1.25
36
0.3 X DVDD
V
V
pF
MHz
50
ps
V
VMID
R
VMID
VREFP to VMID and
VMID to VREFN
VREFP/2 –
50mV
VREFP/2
2050
VREFP/2 +
50mV
V
kΩ
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3.
w
PP Rev 1.0 March 2006
11