WM8728
DSD AUDIO BIPHASE INTERFACE
t
PH
t
BCY
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BCKIN
t
BCH
t
BCL
t
MCL
t
MCH
MCLK
t
MCY
t
SU
t
HD
DIN/LRCIN
D0
D1
D1
D2
D2
Figure 4 Biphase DSD Timing Requirements
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, T
A
= +25
o
C, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
BCKIN cycle time
BCKIN pulse width high
BCKIN pulse width low
MCLK cycle time
MCLK pulse width high
MCLK pulse width low
Phase shift between BCKIN
and MCLK
Data setup time to BCKIN
falling edge
Data hold time to BCKIN
rising edge
SYMBOL
t
BCY
t
BCH
t
BCL
t
MCY
t
MCH
t
MCL
t
PH
t
SU
t
HD
10
10
160
160
80
80
TEST CONDITIONS
MIN
TYP
162.8
81.4
81.4
325.5
162.8
162.8
20
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
Audio Data Input Timing Information
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 April 2001
8
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
