欢迎访问ic37.com |
会员登录 免费注册
发布采购

X1202V8-4.5A 参数 Datasheet PDF下载

X1202V8-4.5A图片预览
型号: X1202V8-4.5A
PDF下载: 下载PDF文件 查看货源
内容描述: [Real Time Clock, Volatile, 0 Timer(s), CMOS, PDSO8, PLASTIC, TSSOP-8]
分类和应用: 时钟光电二极管外围集成电路
文件页数/大小: 23 页 / 173 K
品牌: XICOR [ XICOR INC. ]
 浏览型号X1202V8-4.5A的Datasheet PDF文件第1页浏览型号X1202V8-4.5A的Datasheet PDF文件第3页浏览型号X1202V8-4.5A的Datasheet PDF文件第4页浏览型号X1202V8-4.5A的Datasheet PDF文件第5页浏览型号X1202V8-4.5A的Datasheet PDF文件第6页浏览型号X1202V8-4.5A的Datasheet PDF文件第7页浏览型号X1202V8-4.5A的Datasheet PDF文件第8页浏览型号X1202V8-4.5A的Datasheet PDF文件第9页  
X1202
PIN CONFIGURATION
X1202
8-Pin SOIC
X1
X2
RESET
V
SS
1
2
3
4
8
7
6
5
V
CC
V
BACK
SCL
SDA
10M
X1202
8-Pin TSSOP
V
BACK
V
CC
X1
X2
1
2
3
4
8
7
6
5
SCL
SDA
V
SS
RESET
68pF
360K
X1
X2
32.768kHz quartz crystal is used. Recommended crystal
is a Citizen CFS-206. The crystal supplies a timebase for
a clock/oscillator. The internal clock can be driven by an
external signal on X1, with X2 left unconnected.
Figure 1. Recommended Crystal Connection
12pF
POWER CONTROL OPERATION
The Power control circuit accepts a V
CC
and a V
BACK
input. The power control circuit will switch to V
BACK
when V
CC
< V
BACK
– 0.2V. It will switch back to V
CC
when V
CC
exceeds V
BACK
.
Figure 2. Power Control
V
CC
V
BACK
V
CC
= V
BACK
-0.2V
Internal
Voltage
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of
the device. The input buffer on this pin is always active
(not gated).
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It has an open drain output and may
be wire ORed with other open drain or open collector
outputs. The input buffer is always active (not gated).
An open drain output requires the use of a pull-up
resistor. The output circuitry controls the fall time of
the output signal with the use of a slope controlled pull-
down. The circuit is designed for 400kHz 2-wire inter-
face speeds.
V
BACK
This input provides a backup supply voltage to the
device. V
BACK
supplies power to the device in the
event the V
CC
supply fails.
RESET Output—RESET
This is a reset signal output. This signal notifies a host
processor that the watchdog time period has expired or
that the supply voltage V
CC
has dropped below a fixed
V
TRIP
threshold. It is an open drain active LOW output.
X1, X2
The X1 and X2 pins are the input and output,
respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator. A
REV 1.1.8 5/17/01
REAL TIME CLOCK OPERATION
The Real Time Clock (RTC) uses an external,
32.768kHz quartz crystal to maintain an accurate inter-
nal representation of the year, month, day, date, hour,
minute, and seconds. The RTC has leap-year correc-
tion and century byte. The clock also corrects for
months having fewer than 31 days and has a bit that
controls 24-hour or AM/PM format. When the X1202
powers up after the loss of both V
CC
and V
BACK
, the
clock will not increment until at least one byte is written
to the clock register.
Reading the Real Time Clock
The RTC is read by initiating a Read command and
specifying the address corresponding to the register of
the real time clock. The RTC Registers can then be
read in a Sequential Read Mode. Since the clock runs
continuously and a read takes a finite amount of time,
there is the possibility that the clock could change dur-
ing the course of a read operation. In this device, the
Characteristics subject to change without notice.
www.xicor.com
2 of 23