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X4645V8 参数 Datasheet PDF下载

X4645V8图片预览
型号: X4645V8
PDF下载: 下载PDF文件 查看货源
内容描述: CPU监控器, 64K EEPROM [CPU Supervisor with 64K EEPROM]
分类和应用: 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 22 页 / 401 K
品牌: XICOR [ XICOR INC. ]
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X4643/5 – Preliminary Information
Figure 4. V
TRIP
Programming Sequence
V
TRIP
Programming
Execute
Reset V
TRIP
Sequence
Set V
CC
= V
CC
Applied =
Desired V
TRIP
New V
CC
Applied =
Old V
CC
Applied + Error
Execute
Set V
TRIP
Sequence
New V
CC
Applied =
Old V
CC
Applied - Error
Apply 5V to V
CC
Execute
Reset V
TRIP
Sequence
Decrement V
CC
(V
CC
= V
CC
- 50mV)
NO
RESET pin
goes active?
YES
Error
–Emax
Error
Emax
Measured V
TRIP
-
Desired V
TRIP
–Emax < Error < Emax
DONE
Emax = Maximum Allowed V
TRIP
Error
Control Register
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is removed.
The Control Register is accessed at address FFFFh. It
can only be modified by performing a byte write opera-
tion directly to the address of the register and only one
data byte is allowed for each register write operation.
Prior to writing to the Control Register, the WEL and
RWEL bits must be set using a two step process, with
the whole sequence requiring 3 steps. See "Writing to
the Control Register" below.
The user must issue a stop after sending this byte to the
register to initiate the nonvolatile cycle that stores WD1,
and WD0. The X4643/5 will not acknowledge any data
bytes written after the first byte is entered.
The state of the Control Register can be read at any
time by performing a random read at address FFFFh.
Only one byte is read by each register read operation.
REV 1.26 4/30/02
www.xicor.com
Characteristics subject to change without notice.
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