欢迎访问ic37.com |
会员登录 免费注册
发布采购

ZL30416GGG2 参数 Datasheet PDF下载

ZL30416GGG2图片预览
型号: ZL30416GGG2
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH时钟倍频PLL [SONET/SDH Clock Multiplier PLL]
分类和应用: 时钟
文件页数/大小: 22 页 / 872 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
 浏览型号ZL30416GGG2的Datasheet PDF文件第5页浏览型号ZL30416GGG2的Datasheet PDF文件第6页浏览型号ZL30416GGG2的Datasheet PDF文件第7页浏览型号ZL30416GGG2的Datasheet PDF文件第8页浏览型号ZL30416GGG2的Datasheet PDF文件第10页浏览型号ZL30416GGG2的Datasheet PDF文件第11页浏览型号ZL30416GGG2的Datasheet PDF文件第12页浏览型号ZL30416GGG2的Datasheet PDF文件第13页  
ZL30416
4.2
4.2.1
4.2.1.1
Recommended Interface Circuit
Interfacing to REFin Receiver
Interfacing REFin Receiver to LVPECL Driver
Data Sheet
The ZL30416 REFin differential receiver can be connected to LVPECL compatible driver with an interface circuit, as
shown in Figure 7. The R1s and R2s terminating resistors should be placed close to the REFin input balls.
ZL30416
VCC=+3.3V
VDD/2
R1
Z=50
LVPECL
Driver
Z=50
R2
R1
Cc
Receiver
REFinP
REFinN
R2
Cc
Typical resistor values: R1 = 127
Ω,
R2 =82.5
Typical capacitor values: Cc = 0.1
µF
Figure 6 - Interfacing to LVPECL Driver
4.2.1.2
Interfacing REFin Receiver to LVDS or CML Drivers
The ZL30416 REFin differential receiver can be connected to LVDS or CML driver with an interface circuit, as
shown in Figure 7. The 100
terminating resistors should be placed close to the REFin input balls.
ZL30416
VDD/2
Z=50
100Ω
Z=50
REFinN
Cc
Cc
REFinP
Receiver
LVDS
or
CML
Driver
Typical capacitor values: Cc = 0.1
µF
Figure 7 - Interfacing to LVDS or CML Driver
9
Zarlink Semiconductor Inc.