Z8 Encore! XP® 4K Series
Product Specification
16
Register Map
Table 8 provides the address map for the Register File of the Z8 Encore! XP® 4K Series
devices. Not all devices and package styles in the Z8 Encore! XP® 4K Series support the
ADC, or all of the GPIO Ports. Consider registers for unimplemented peripherals as
Reserved.
Table 8. Register File Address Map
Address (Hex) Register Description
General Purpose RAM
Mnemonic
Reset (Hex)
Page #
Z8F042A/Z8F041A Devices
000–3FF
400–EFF
General-Purpose Register File RAM
Reserved
—
—
XX
XX
Z8F012A/Z8F021A Devices
000–1FF
200–EFF
General-Purpose Register File RAM
Reserved
—
—
XX
XX
Z8F022A/Z8F011A Devices
000–0FF
100–EFF
General-Purpose Register File RAM
—
—
XX
XX
Reserved
Timer 0
F00
Timer 0 High Byte
T0H
00
01
FF
FF
00
00
00
00
76
76
77
77
77
78
78
79
F01
Timer 0 Low Byte
T0L
F02
Timer 0 Reload High Byte
Timer 0 Reload Low Byte
Timer 0 PWM High Byte
Timer 0 PWM Low Byte
Timer 0 Control 0
T0RH
F03
T0RL
F04
T0PWMH
T0PWML
T0CTL0
T0CTL1
F05
F06
F07
Timer 0 Control 1
Timer 1
F08
Timer 1 High Byte
T1H
00
01
FF
FF
00
00
76
76
77
77
77
78
F09
Timer 1 Low Byte
T1L
F0A
Timer 1 Reload High Byte
Timer 1 Reload Low Byte
Timer 1 PWM High Byte
Timer 1 PWM Low Byte
T1RH
T1RL
F0B
F0C
T1PWMH
T1PWML
F0D
XX=Undefined
PS022815-0206
Register Map
ZILOG [ ZILOG, INC. ]
