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产品型号5962-9233602VXA的Datasheet PDF文件预览

LP2953QML  
LP2953QML Adjustable Micropower Low-Dropout Voltage Regulators  
Literature Number: SNVS395A  
September 1, 2011  
LP2953QML  
Adjustable Micropower Low-Dropout Voltage Regulators  
General Description  
Features  
The LP2953A is a micropower voltage regulator with very low  
quiescent current (130 μA typical at 1 mA load) and very low  
dropout voltage (typ. 60 mV at light load and 470 mV at 250  
mA load current). It is ideally suited for battery-powered sys-  
tems. Furthermore, the quiescent current increases only  
slightly at dropout, which prolongs battery life.  
Output voltage adjusts from 1.23V to 29V  
Guaranteed 250 mA output current  
Extremely low quiescent current  
Low dropout voltage  
Extremely tight line and load regulation  
Very low temperature coefficient  
The LP2953A retains all the desirable characteristics of the  
LP2951, but offers increased output current, additional fea-  
tures, and an improved shutdown function.  
Current and thermal limiting  
Reverse battery protection  
The internal crowbar pulls the output down quickly when the  
shutdown is activated.  
50 mA (typical) output pulldown crowbar  
Auxiliary comparator included with CMOS/TTL compatible  
The error flag goes low if the output voltage drops out of reg-  
ulation.  
output levels. Can be used for fault detection, low input line  
detection, etc.  
Reverse battery protection is provided.  
The internal voltage reference is made available for external  
use, providing a low-T.C. reference with very good line and  
load regulation.  
Applications  
High-efficiency linear regulator  
Regulator with under-voltage shutdown  
Low dropout battery-powered regulator  
Snap-ON/Snap-OFF regulator  
Ordering Information  
NS Part Number  
LP2953AMWG/883  
LP2953AMWG-QMLV  
LP2953AMGW/883  
LP2953AMGW-QMLV  
LP2953 MDS  
SMD Part Number  
5962-9233601QXA  
5962-9233601VXA  
5962-9233602QXA  
5962-9233602VXA  
NS Package Number  
WG16A  
Package Description  
16LD Ceramic SOIC  
16LD Ceramic SOIC  
16LD Ceramic SOIC  
16LD Ceramic SOIC  
Bare Die  
WG16A  
WG16A  
WG16A  
(Note 1)  
Note 1: FOR ADDITIONAL DIE INFORMATION, PLEASE VISIT THE HI REL WEB SITE AT: www.national.com/analog/space/level_die  
Connection Diagrams  
LP2953  
16-Pin Ceramic SOIC  
20161114  
© 2011 National Semiconductor Corporation  
201611  
www.national.com  
 
Schematic Diagram  
20161106  
www.national.com  
2
Block Diagram  
LP2953  
20161102  
3
www.national.com  
Absolute Maximum Ratings (Note 2)  
Storage Temperature Range  
Operating Temperature Range  
−65°C TA +150°C  
−55°C TA +125°C  
+150°C  
Maximum Junction Temperature  
Lead Temp. (Soldering, 5 seconds)  
Power Dissipation (Note 3)  
Input Supply Voltage  
Feedback Input Voltage (Note 5)  
Comparator Input Voltage (Note 6)  
Shutdown Input Voltage (Note 6)  
Comparator Output Voltage (Note 6)  
Thermal Resistance  
260°C  
Internally Limited  
−20V to +30V  
−0.3V to +5V  
−0.3V to +30V  
−0.3V to +30V  
−0.3V to +30V  
ꢀꢀθJA  
16LD Ceramic SOIC (Still Air) “WG”  
16LD Ceramic SOIC (500LF/Min Air flow) “WG”  
16LD Ceramic SOIC (Still Air) “GW”  
16LD Ceramic SOIC (500LF/Min Air flow) “GW”  
ꢀꢀθJC  
134°C/W  
81°C/W  
140°C/W  
90°C/W  
16LD Ceramic SOIC “WG”(Note 4)  
16LD Ceramic SOIC “GW”  
7°C/W  
15°C/W  
Package Weight (Typical)  
16LD Ceramic SOIC “WG”  
16LD Ceramic SOIC “GW”  
ESD Rating (Note 7)  
360mg  
410mg  
2 KV  
Quality Conformance Inspection  
Mil-Std-883, Method 5005 - Group A  
Subgroup  
Description  
Static tests at  
Temp (°C)  
1
2
+25  
+125  
-55  
Static tests at  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
Settling time at  
Settling time at  
Settling time at  
+25  
+125  
-55  
5
6
7
+25  
+125  
-55  
8A  
8B  
9
+25  
+125  
-55  
10  
11  
12  
13  
14  
+25  
+125  
-55  
www.national.com  
4
LP2953A Electrical Characteristics  
DC Parameters  
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V  
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.  
Sub-  
groups  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
Units  
4.975 5.025  
4.94 5.06  
4.93 5.07  
V
V
V
1
2, 3  
VO  
Output Voltage  
1, 2, 3  
1mA IL 250mA  
Output Voltage Line  
Regulation  
VI = 6V to 30V  
0.1  
0.2  
%
1
2, 3  
1
ΔVO / VO  
ΔVO / VO  
%
0.16  
0.2  
%
IL = 1mA to 250mA  
IL = 0.1mA to 1mA  
IL = 1mA  
%
2, 3  
1
Output Voltage Load  
Regulation  
0.16  
0.2  
%
%
2, 3  
1
100  
150  
300  
420  
400  
520  
600  
800  
170  
200  
2.0  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
µA  
µA  
mA  
mA  
mA  
mA  
mA  
mA  
µA  
µA  
(Note 8)  
(Note 8)  
(Note 8)  
(Note 8)  
(Note 9)  
(Note 9)  
(Note 9)  
(Note 9)  
(Note 9)  
2, 3  
1
IL = 50mA  
2, 3  
1
VI - VO  
Dropout Voltage  
IL = 100mA  
2, 3  
1
IL = 250mA  
2, 3  
1
IL = 1mA  
2, 3  
1
IL = 50mA  
2.5  
2, 3  
1
IGnd  
Ground Pin Current  
6.0  
IL = 100mA  
8.0  
2, 3  
1
28  
IL = 250mA  
33  
2, 3  
1
210  
240  
Ground Pin Current at  
Dropout  
IGnd  
IGnd  
ILimit  
VI = 4.5V, IL = 100µA  
2, 3  
Ground Pin Current at  
Shutdown  
(Note 9),  
(Note 12)  
140  
µA  
1
500  
mA  
mA  
%/W  
V
1
2, 3  
1
VO = 0V  
Current Limit  
530  
ΔVO / ΔPD Thermal Regulation  
(Note 10)  
(Note 11)  
0.2  
1.215 1.245  
1
VRef  
Reference Voltage  
1.205 1.255  
V
2, 3  
1
0.1  
0.2  
%
VI = 2.5V to 6V  
VI = 6V to 30V  
IRef = 0 to 200µA  
%
2, 3  
1
Reference Voltage Line  
Regulation  
ΔVRef / VRef  
0.1  
%
0.2  
%
2, 3  
1
0.4  
%
ΔVRef / VRef Reference Voltage Load  
Regulation  
0.6  
%
2, 3  
1
40  
nA  
nA  
mA  
mA  
Feedback Pin Bias  
Current  
IB FB  
60  
2, 3  
1
30  
Output "Off" Pulldown  
Current  
IO Sink  
(Note 12)  
20  
2, 3  
5
www.national.com  
Dropout Detection Comparator Parameters  
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V  
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.  
Sub-  
groups  
Symbol  
IOH  
Parameter  
Conditions  
Notes  
Min Max  
Units  
1.0  
2.0  
µA  
µA  
1
2, 3  
1
VOH = 30V  
VI = 4V, IO Comp = 400µA  
Output "High" Leakage  
Output "Low" Voltage  
250  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
VOL  
400  
2, 3  
1
-320 -150  
VTh Max  
Upper Threshold Voltage  
Lower Threshold Voltage  
(Note 13) -380 -130  
-380 -120  
2
3
-450 -280  
1
VTh Min  
(Note 13) -640 -180  
-640 -155  
2
3
Shutdown Input Parameters  
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V  
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.  
Sub-  
groups  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
Units  
-7.5  
-10  
-12  
-30  
-50  
-75  
7.5  
10  
12  
30  
50  
75  
mV  
mV  
mV  
nA  
1
2
3
1
2
3
VIO  
Referred to VRef  
Input Offset Voltage  
IIB  
VI Comp = 0 to 5V  
Input Bias Current  
nA  
nA  
Auxillary Comparator Parameters  
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V  
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.  
Sub-  
groups  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
Units  
-7.5  
-10  
-12  
-30  
-50  
-75  
7.5  
10  
mV  
mV  
mV  
nA  
1
2
3
1
2
3
1
2
3
1
2
3
VIO  
Referred to VRef  
Input Offset Voltage  
12  
30  
IIB  
VI Comp = 0 to 5V  
Input Bias Current  
50  
nA  
75  
nA  
1.0  
2.0  
2.2  
250  
400  
420  
µA  
IOH  
VOH = 30V, VI Comp = 1.3V  
VI Comp = 1.1V, IO Comp = 400µA  
Output "High" Leakage  
Output "Low" Voltage  
µA  
µA  
mV  
mV  
mV  
VOL  
www.national.com  
6
DC Drift Parameters  
The following conditions apply, unless otherwise specified. VI = 6V, IL = 1mA, CL = 2.2µF, VO = 5V  
Feedback pin is tied to 5V Tap pin. Output pin is tied to Output Sense Pin.  
Δcalculations performed on QMLV devices at group B , subgroup 5.  
Sub-  
groups  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
Units  
IL = 1mA  
-12  
-12  
-12  
-12  
-5.0  
12  
12  
12  
12  
5.0  
%
%
1
1
1
1
1
IL = 50mA  
IL = 100mA  
IL = 250mA  
VI - VO  
Dropout Voltage  
%
%
IL = 1mA, ±5µA or ±10% whichever is  
greater  
µA  
IL = 50mA, ±5µA or ±10% whichever is  
greater  
-5.0  
-5.0  
-5.0  
-5.0  
-5.0  
5.0  
5.0  
5.0  
5.0  
5.0  
µA  
µA  
µA  
µA  
µA  
1
1
1
1
1
IGnd  
Ground Pin Current  
IL = 100mA, ±5µA or ±10% whichever is  
greater  
IL = 250mA, ±5µA or ±10% whichever is  
greater  
VI = 4.5V, IL = 100µA,  
Ground Pin Current at  
Dropout  
IGnd  
IGnd  
VIO  
±5µA or ±10% whichever is greater  
±5µA or ±10% whichever is greater  
Ground Pin Current at  
Shutdown  
Referred to VRef Shutdown Input  
-1.0  
-1.0  
-5.0  
-5.0  
1.0  
1.0  
5.0  
5.0  
mV  
mV  
nA  
1
1
1
1
Input Offset Voltage  
Input Bias Current  
Referred to VRef Auxillary Comparator  
VI Comp = 0 to 5V Shutdown Input  
VI Comp = 0 to 5V Auxillary Comparator  
IIB  
nA  
Note 2: Abs. Max Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is functional,  
but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Characteristics. The guarantees apply only for  
the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.  
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package  
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/  
θ
JA or the number given in the Absolute Maximum Ratings, whichever is lower.  
Note 4: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this  
improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through,  
the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θJA, rather than θJC, thermal resistance. It must  
not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the leadframe material is very poor,  
relative to the material of the package base. The stated θJC thermal resistance is for the package material only, and does not account for the additional thermal  
resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine  
this with the stated value for the package, to calculate the total allowed power dissipation for the device.  
Note 5: When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped to ground.  
Note 6: May exceed the input supply voltage.  
Note 7: Human body model, 1.5 KΩ in series with 100 pF.  
Note 8: Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential.  
At very low values of programmed output voltage, the input voltage minimum of 2V (2.3V over temperature) must be observed.  
Note 9: Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the ground pin current, output load current,  
and current through the external resistive divider (if used).  
Note 10: Thermal regulation is the change in output voltage at a time T after a change in power dissipation, excluding load or line regulation effects. Specifications  
are for a 200 mA load pulse at VI = VO(Nom)+15V (3W pulse) for T = 10 mS.  
Note 11: VRef VO (VI − 1V), 2.3V VI 30V, 100 μA IL 250 mA.  
Note 12: VShutdown 1.1V, VO = VO(Nom).  
Note 13: Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal VRef measured at VI = VO(Nom) +  
1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VO/ VRef = (R1 + R2)/R2 (refer to Figure 2).  
7
www.national.com  
 
 
 
 
 
 
 
 
 
 
 
 
Typical Performance Characteristics  
Unless otherwise specified: VI = 6V, IL = 1 mA, CL = 2.2 μF, VSD = 3V, TA = 25°C, VO = 5V.  
Quiescent Current  
Quiescent Current  
20161127  
20161128  
Ground Pin Current vs Load  
Ground Pin Current  
20161130  
20161129  
Ground Pin Current  
Output Noise Voltage  
20161131  
20161132  
www.national.com  
8
Ripple Rejection  
Ripple Rejection  
Line Transient Response  
Output Impedance  
20161133  
20161134  
Ripple Rejection  
20161136  
20161135  
Line Transient Response  
20161137  
20161138  
9
www.national.com  
Load Transient Response  
Dropout Characteristics  
Enable Transient  
Load Transient Response  
20161139  
20161140  
Enable Transient  
20161141  
20161142  
Short-Circuit Output Current  
and Maximum Output Current  
20161143  
20161144  
www.national.com  
10  
Feedback Bias Current  
Feedback Pin Current  
20161145  
20161147  
20161149  
20161146  
Error Output  
Comparator Sink Current  
20161148  
Divider Resistance  
Dropout Detection  
Comparator Threshold  
Voltages  
20161150  
11  
www.national.com  
Thermal Regulation  
Minimum Operating Voltage  
20161151  
20161152  
Dropout Voltage  
20161153  
www.national.com  
12  
MINIMUM LOAD  
Application Hints  
When setting the output voltage using an external resistive  
divider, a minimum current of 1 μA is recommended through  
the resistors to provide a minimum load.  
HEATSINK REQUIREMENTS  
The maximum allowable power dissipation for the LP2953 is  
limited by the maximum junction temperature (+150°C) and  
the two parameters that determine how quickly heat flows  
away from the die: the ambient temperature and the junction-  
to-ambient thermal resistance of the part.  
It should be noted that a minimum load current is specified in  
several of the electrical characteristic test conditions, so this  
value must be used to obtain correlation on these tested lim-  
its.  
The military parts which are manufactured in ceramic DIP  
packages contain a KOVAR lead frame (unlike the industrial  
parts, which have a copper lead frame). The KOVAR material  
is necessary to attain the hermetic seal required in military  
applications.  
The KOVAR lead frame does not conduct heat as well as  
copper, which means that the PC board copper can not be  
used to significantly reduce the overall junction-to-ambient  
thermal resistance.  
The power dissipation calculations are done using a fixed  
value for θ(J–A), the junction-to-ambient thermal resistance, of  
134°C/W and can not be changed by adding copper foil pat-  
terns to the PC board. This leads to an important fact: The  
maximum allowable power dissipation in any application us-  
ing the LP2953 is dependent only on the ambient tempera-  
ture:  
20161126  
FIGURE 1. Power Derating Curve for LP2953  
PROGRAMMING THE OUTPUT VOLTAGE  
The regulator may be pin-strapped for 5V operation using its  
internal resistive divider by tying the Output and Sense pins  
together and also tying the Feedback and 5V Tap pins to-  
gether.  
Alternatively, it may be programmed for any voltage between  
the 1.23V reference and the 30V maximum rating using an  
external pair of resistors (see Figure 2). The complete equa-  
tion for the output voltage is:  
EXTERNAL CAPACITORS  
A 2.2 μF (or greater) capacitor is required between the output  
pin and ground to assure stability when the output is set to  
5V. Without this capacitor, the part will oscillate. Most type of  
tantalum or aluminum electrolytics will work here. Film types  
will work, but are more expensive. Many aluminum electrolyt-  
ics contain electrolytes which freeze at −30°C, which requires  
the use of solid tantalums below −25°C. The important pa-  
rameters of the capacitor are an ESR of about 5Ω or less and  
a resonant frequency above 500 kHz (the ESR may increase  
by a factor of 20 or 30 as the temperature is reduced from  
25°C to −30°C). The value of this capacitor may be increased  
without limit.  
where VREF is the 1.23V reference and IFB is the Feedback  
pin bias current (−20 nA typical). The minimum recommended  
load current of 1 μA sets an upper limit of 1.2 MΩ on the value  
of R2 in cases where the regulator must work with no load  
(see Minimim Load ). IFB will produce a typical 2% error in  
VO which can be eliminated at room temperature by trimming  
R1. For better accuracy, choosing R2 = 100 kΩ will reduce  
this error to 0.17% while increasing the resistor program cur-  
rent to 12 μA. Since the typical quiescent current is 120 μA,  
this added current is negligible.  
At lower values of output current, less output capacitance is  
required for stability. The capacitor can be reduced to  
0.68 μF for currents below 10 mA or 0.22 μF for currents below  
1 mA.  
Programming the output for voltages below 5V runs the error  
amplifier at lower gains requiring more output capacitance for  
stability. At 3.3V output, a minimum of 4.7 μF is required. For  
the worst-case condition of 1.23V output and 250 mA of load  
current, a 6.8 μF (or larger) capacitor should be used.  
A 1 μF capacitor should be placed from the input pin to ground  
if there is more than 10 inches of wire between the input and  
the AC filter capacitor or if a battery input is used.  
Stray capacitance to the Feedback terminal can cause insta-  
bility. This problem is most likely to appear when using high  
value external resistors to set the output voltage. Adding a  
100 pF capacitor between the Output and Feedback pins and  
increasing the output capacitance to 6.8 μF (or greater) will  
cure the problem.  
13  
www.national.com  
20161110  
* In shutdown mode, ERROR will go high if it has been pulled up to an ex-  
ternal supply. To avoid this invalid response, pull up to regulator output.  
20161109  
** Exact value depends on dropout voltage. (See Application Hints)  
* See Application Hints  
** Drive with TTL-low to shut down  
FIGURE 3. ERROR Output Timing  
FIGURE 2. Adjustable Regulator  
DROPOUT VOLTAGE  
OUTPUT ISOLATION  
The regulator output can be left connected to an active volt-  
age source (such as a battery) with the regulator input power  
shut off, as long as the regulator ground pin is connected  
to ground. If the ground pin is left floating, damage to the  
regulator can occur if the output is pulled up by an external  
voltage source.  
The dropout voltage of the regulator is defined as the mini-  
mum input-to-output voltage differential required for the out-  
put voltage to stay within 100 mV of the output voltage  
measured with a 1V differential. The dropout voltage is inde-  
pendent of the programmed output voltage.  
REDUCING OUTPUT NOISE  
DROPOUT DETECTION COMPARATOR  
In reference applications it may be advantageous to reduce  
the AC noise present on the output. One method is to reduce  
regulator bandwidth by increasing output capacitance. This is  
relatively inefficient, since large increases in capacitance are  
required to get significant improvement.  
This comparator produces a logic “LOW” whenever the output  
falls out of regulation by more than about 5%. This figure re-  
sults from the comparator's built-in offset of 60 mV divided by  
the 1.23V reference (refer to block diagrams on page 1). The  
5% low trip level remains constant regardless of the pro-  
grammed output voltage. An out-of-regulation condition can  
result from low input voltage, current limiting, or thermal lim-  
iting.  
Noise can be reduced more effectively by a bypass capacitor  
placed across R1 (refer to Figure 2). The formula for selecting  
the capacitor to be used is:  
Figure 3 gives a timing diagram showing the relationship be-  
tween the output voltage, the ERROR output, and input volt-  
age as the input voltage is ramped up and down to a regulator  
programmed for 5V output. The ERROR signal becomes low  
at about 1.3V input. It goes high at about 5V input, where the  
output equals 4.75V. Since the dropout voltage is load de-  
pendent, the input voltage trip points will vary with load  
current. The output voltage trip point does not vary.  
The comparator has an open-collector output which requires  
an external pull-up resistor. This resistor may be connected  
to the regulator output or some other supply voltage. Using  
the regulator output prevents an invalid “HIGH” on the com-  
parator output which occurs if it is pulled up to an external  
voltage while the regulator input voltage is reduced below  
1.3V. In selecting a value for the pull-up resistor, note that  
while the output can sink 400 μA, this current adds to battery  
drain. Suggested values range from 100 kΩ to 1 MΩ. This  
resistor is not required if the output is unused.  
This gives a value of about 0.1 μF. When this is used, the  
output capacitor must be 6.8 μF (or greater) to maintain sta-  
bility. The 0.1 μF capacitor reduces the high frequency gain  
of the circuit to unity, lowering the output noise from 260 μV  
to 80 μV using a 10 Hz to 100 kHz bandwidth. Also, noise is  
no longer proportional to the output voltage, so improvements  
are more pronounced at high output voltages.  
AUXILIARY COMPARATOR  
The LP2953 contains an auxiliary comparator whose invert-  
ing input is connected to the 1.23V reference. The auxiliary  
comparator has an open-collector output whose electrical  
characteristics are similar to the dropout detection compara-  
tor. The non-inverting input and output are brought out for  
external connections.  
When VIN 1.3V, the error flag pin becomes a high  
impedance, allowing the error flag voltage to rise to its pull-up  
voltage. Using VOUT as the pull-up voltage (rather than an ex-  
ternal 5V source) will keep the error flag voltage below 1.2V  
(typical) in this condition. The user may wish to divide down  
the error flag voltage using equal-value resistors (10 kΩ sug-  
gested) to ensure a low-level logic signal during any fault  
condition, while still allowing a valid high logic level during  
normal operation.  
SHUTDOWN INPUT  
A logic-level signal will shut off the regulator output when a  
“LOW” (<1.2V) is applied to the Shutdown input.  
To prevent possible mis-operation, the Shutdown input must  
be actively terminated. If the input is driven from open-collec-  
tor logic, a pull-up resistor (20 kΩ to 100 kΩ recommended)  
should be connected from the Shutdown input to the regulator  
input.  
www.national.com  
14  
 
 
If the Shutdown input is driven from a source that actively pulls  
high and low (like an op-amp), the pull-up resistor is not re-  
quired, but may be used.  
ground, the reverse-battery protection feature which protects  
the regulator input is sacrificed if the Shutdown input is tied  
directly to the regulator input.  
If the shutdown function is not to be used, the cost of the pull-  
up resistor can be saved by simply tying the Shutdown input  
directly to the regulator input.  
If reverse-battery protection is required in an application, the  
pull-up resistor between the Shutdown input and the regulator  
input must be used.  
IMPORTANT: Since the Absolute Maximum Ratings state  
that the Shutdown input can not go more than 0.3V below  
15  
www.national.com  
Typical Applications  
Basic 5V Regulator  
20161115  
5V Current Limiter with Load Fault Indicator  
20161116  
* Output voltage equals +VIN minum dropout voltage, which varies with output current. Current limits at a maximum of 380 mA (typical).  
** Select R1 so that the comparator input voltage is 1.23V at the output voltage which corresponds to the desired fault current value.  
www.national.com  
16  
Low T.C. Current Sink  
20161117  
5V Regulator with Error Flags for  
LOW BATTERY and OUT OF REGULATION  
20161118  
* Connect to Logic or μP control inputs.  
LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or power down some hardware  
with high power requirements. The output is still in regulation at this time.  
OUT OF REGULATION flag indicates when the battery is almost completely discharged, and can be used to initiate a power-down sequence.  
17  
www.national.com  
5V Battery Powered Supply with Backup and Low Battery Flag  
20161119  
The circuit switches to the NI-CAD backup battery when the main battery voltage drops below about 5.6V, and returns to the main battery when its voltage is  
recharged to about 6V.  
The 5V MAIN output powers circuitry which requires no backup, and the 5V MEMORY output powers critical circuitry which can not be allowed to lose power.  
* The BATTERY LOW flag goes low whenever the circuit switches to the NI-CAD backup battery.  
5V Regulator with Timed Power-On Reset  
20161120  
Timing Diagram for Timed Power-On Reset  
20161121  
* RT = 1 MEG, CT = 0.1 μF  
www.national.com  
18  
5V Regulator with Error Flags for  
LOW BATTERY and OUT OF REGULATION  
with SNAP-ON/SNAP-OFF Output  
20161123  
* Connect to Logic or μP control inputs.  
OUTPUT has SNAP-ON/SNAP-OFF feature.  
LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or shut down hardware with high  
power requirements. The output is still in regulation at this time.  
OUT OF REGULATION flag goes low if the output goes below about 4.7V, which could occur from a load fault.  
OUTPUT has SNAP-ON/SNAP-OFF feature. Regulator snaps ON at about 5.7V input, and OFF at about 5.6V.  
5V Regulator with Timed Power-On Reset, Snap-On/Snap-Off Feature and Hysteresis  
20161124  
Timing Diagram  
20161125  
Td = (0.28) RC = 28 ms for components shown.  
19  
www.national.com  
Revision History Section  
Released  
Revision  
Section  
Changes  
11/30/2010  
A
New Release, Corporate format  
1 MDS data sheet converted into one Corp. data  
sheet format. MNLP2953AM-X Rev 1A1 will be  
archived.  
09/01/2011  
B
Ordering Information, Absolute Maximum  
Ratings  
Ordering Information — entered new 'GW' devices.  
Absolute Maximum Ratings — added new Theta JA  
and Theta JC numbers. LP2953QML Rev A will be  
archived.  
www.national.com  
20  
Physical Dimensions inches (millimeters) unless otherwise noted  
16-Pin Ceramic Surface-Mount  
NS Package Number WG16A  
21  
www.national.com  
Notes  
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配单直通车
5962-9233602VXA产品参数
型号:5962-9233602VXA
是否Rohs认证: 不符合
生命周期:Active
IHS 制造商:DEFENSE LOGISTICS AGENCY
零件包装代码:SOIC
包装说明:CERAMIC, SOIC-16
针数:16
Reach Compliance Code:unknown
ECCN代码:EAR99
HTS代码:8542.39.00.01
风险等级:5.32
最大回动电压 1:0.8 V
JESD-30 代码:R-GDSO-G16
JESD-609代码:e0
功能数量:1
端子数量:16
工作温度TJ-Max:150 °C
最大输出电流 1:0.25 A
最大输出电压 1:29 V
最小输出电压 1:1.23 V
标称输出电压 1:5 V
封装主体材料:CERAMIC, GLASS-SEALED
封装代码:SOP
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Qualified
调节器类型:FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
筛选级别:MIL-PRF-38535 Class V
座面最大高度:2.33 mm
表面贴装:YES
技术:BIPOLAR
端子面层:TIN LEAD
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.35 mm
Base Number Matches:1
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