CX82100 Home Network Processor Data Sheet
Figure 8-3. USB Receive Data Flow..................................................................................................................................8-4
Figure 8-4. Example of an USB Device for HNP ...............................................................................................................8-7
Figure 8-5. Loading of the EndPtBuf Configurations ........................................................................................................8-9
Figure 8-6. DMA Channel Supporting USB Receive OUT Endpoints...............................................................................8-10
Figure 8-7. DMA Channels for USB Transmit IN Endpoints............................................................................................8-12
Figure 9-1. GPIO[x] Interface...........................................................................................................................................9-1
Figure 13-1. Clock Generation Block Diagram................................................................................................................13-2
Figure 13-2. Clocks Generated in the PLL Bypass Mode..............................................................................................13-10
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