CY2292
Electrical Characteristics, Industrial 5.0V
Parameter
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZ
I
DD
I
DDS
Description
HIGH-Level Output Voltage
LOW-Level Output Voltage
HIGH-Level Input
Voltage
[9]
[9]
Conditions
I
OH
= 4.0 mA
I
OL
= 4.0 mA
Except crystal pins
Except crystal pins
V
IN
= V
DD
– 0.5V
V
IN
= +0.5V
Three-state outputs
V
DD
= V
DD
Max., 5V operation
Shutdown active CY2292I/CY2292FI
Min.
2.4
Typ.
Max.
0.4
Unit
V
V
V
V
µA
µA
µA
mA
µA
2.0
0.8
<1
<1
75
10
10
10
250
110
100
LOW-Level Input Voltage
Input HIGH Current
Input LOW Current
Output Leakage Current
V
DD
Supply Current
[10]
Industrial
V
DD
Power Supply Current in
Shutdown Mode
[10]
Electrical Characteristics, Industrial 3.3V
Parameter
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZ
I
DD
I
DDS
Description
HIGH-Level Output Voltage
LOW-Level Output Voltage
HIGH-Level Input
LOW-Level Input
Voltage
[9]
Voltage
[9]
I
OH
= 4.0 mA
I
OL
= 4.0 mA
Except crystal pins
Except crystal pins
V
IN
= V
DD
– 0.5V
V
IN
= +0.5V
Three-state outputs
V
DD
= V
DD
Max., 3.3V operation
Shutdown active
CY2292I/CY2292FI
50
10
<1
<1
2.0
0.8
10
10
250
70
100
Conditions
Min.
2.4
0.4
Typ.
Max.
Unit
V
V
V
V
µA
µA
µA
mA
µA
Input HIGH Current
Input LOW Current
Output Leakage Current
V
DD
Supply Current
[10]
Indus-
trial
V
DD
Power Supply Current in
Shutdown Mode
[10]
Switching Characteristics, Commercial 5.0V
Parameter
t
1
Name
Output Period
Description
Clock output range, 5V
operation
CY2292
CY2292F
Output Duty Cycle
[11]
Duty cycle for outputs, defined as t
2
÷
t
1[12]
f
OUT
> 66 MHz
Duty cycle for outputs, defined as t
2
÷
t
1[12]
f
OUT
< 66 MHz
t
3
t
4
t
5
t
6
t
7
t
8
Rise Time
Fall Time
Output Disable Time
Output Enable Time
Skew
CPUCLK Slew
Output clock rise time
[13]
Output clock fall
time
[13]
Time for output to enter three-state mode
after SHUTDOWN/OE goes LOW
Time for output to leave three-state mode
after SHUTDOWN/OE goes HIGH
Skew delay between any identical or
related outputs
[3, 12, 14]
Frequency transition rate
1.0
Min.
10
(100 MHz)
11.1
(90 MHz)
40%
45%
50%
50%
3
2.5
10
10
< 0.25
Typ.
Max.
13000
(76.923 kHz)
13000
(76.923 kHz)
60%
55%
5
4
15
15
0.5
20.0
ns
ns
ns
ns
ns
MHz/ms
Unit
ns
ns
Notes:
11. XBUF duty cycle depends on XTALIN duty cycle.
12. Measured at 1.4V.
13. Measured between 0.4V and 2.4V.
14. Jitter varies with configuration. All standard configurations sample tested at the factory conform to this limit. For more information on jitter, please refer to the
application note:
Jitter in PLL-Based Systems.
Document #: 38-07449 Rev. *C
Page 5 of 11
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