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CY7C1061AV33-10ZXC 参数 Datasheet PDF下载

CY7C1061AV33-10ZXC图片预览
型号: CY7C1061AV33-10ZXC
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 1M ×16 )静态RAM [16-Mbit (1M x 16) Static RAM]
分类和应用:
文件页数/大小: 10 页 / 642 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C1061AV33
Data Retention Waveform
DATA RETENTION MODE
V
CC
CE
3.0V
t
CDR
V
DR
> 2V
3.0V
t
R
Switching Waveforms
Read Cycle No. 1
(Address Transition Controlled)
t
RC
RC
ADDRESS
t
OHA
DATA OUT
PREVIOUS DATA VALID
t
AA
DATA VALID
Read Cycle No. 2
(OE Controlled)
ADDRESS
t
RC
CE
1
CE
2
t
ACE
BHE/BLE
t
DBE
t
LZBE
OE
t
DOE
t
LZOE
HIGH IMPEDANCE
t
LZCE
V
CC
SUPPLY
CURRENT
t
PU
50%
50%
I
CC
I
SB
t
HZOE
HIGH
IMPEDANCE
t
HZBE
t
PD
t
HZCE
DATA OUT
DATA VALID
Notes
12. Device is continuously selected. OE, CE, BHE or BHE, or both = V
IL
. CE2 = V
IH
.
13. WE is HIGH for Read cycle.
14. Address valid prior to or coincident with CE
1
transition LOW and CE
2
transition HIGH.
Document #: 38-05256 Rev. *G
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