CY7C1354C, CY7C1356C
Partial Write Cycle Description
The following table lists the Partial Write Cycle Description for CY7C1356C.
Function (CY7C1356C)
Read
Write – no bytes written
Write byte a
(DQ
a
and DQP
a)
Write byte b – (DQ
b
and DQP
b)
Write both bytes
WE
H
L
L
L
L
BW
b
x
H
H
L
L
BW
a
x
H
L
H
L
Notes
10. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for all chip enables active. BWx = L signifies at least one bytewrite select is active, BWx = valid signifies
that the desired byte write selects are asserted, see Write Cycle Description table for details.
11. Write is defined by WE and BWX. See Write Cycle Description table for details.
12. When a write cycle is detected, all I/Os are tri-stated, even during byte writes.
13. Table only lists a partial listing of the byte write combinations. Any combination of BW
X
is valid. Appropriate write will be done based on which byte write is active.
Document Number: 38-05538 Rev. *K
Page 11 of 32
CYPRESS [ CYPRESS SEMICONDUCTOR ]
