May 1996
NDS8435
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
Features
-7A, -30V. R
DS(ON)
= 0.028
Ω
@ V
GS
= -10V
R
DS(ON)
= 0.045
Ω
@ V
GS
= -4.5V.
High density cell design for extremely low R
DS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
5
6
7
4
3
2
1
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
NDS8435
-30
-20
(Note 1a)
Units
V
V
A
-7
-25
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
2.5
1.2
1
-55 to 150
W
T
J
,T
STG
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8435 Rev. B2
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
