Mandatory Reset Configurations
V
DDH
MUR420
V
DDL
1N5820
Figure 3. Example Voltage Sequencing Circuit
9
Mandatory Reset Configurations
The MPC875/870 requires a mandatory configuration during reset.
If hardware reset configuration word (HRCW) is enabled, the HRCW[DBGC] value needs to be set to binary X1 in
the HRCW and the SIUMCR[DBGC] should be programmed with the same value in the boot code after reset. This
can be done by asserting the RSTCONF during HRESET assertion.
If HRCW is disabled, the SIUMCR[DBGC] should be programmed with binary X1 in the boot code after reset by
negating the RSTCONF during the HRESET assertion.
The MBMR[GPLB4DIS], PAPAR, PADIR, PBPAR, PBDIR, PCPAR, and PCDIR need to be configured with the
mandatory values in
in the boot code after the reset is negated.
Table 7. Mandatory Reset Configuration of MPC875/870
Register/Configuration
HRCW
(Hardware reset configuration word)
SIUMCR
(SIU module configuration register)
MBMR
(Machine B mode register)
PAPAR
(Port A pin assignment register)
PADIR
(Port A data direction register)
PBPAR
(Port B pin assignment register)
PBDIR
(Port B data direction register)
PCPAR
(Port C pin assignment register)
Field
HRCW[DBGC]
SIUMCR[DBGC]
MBMR[GPLB4DIS}
PAPAR[5:9]
PAPAR[12:13]
PADIR[5:9]
PADIR[12:13]
PBPAR[14:18]
PBPAR[20:22]
PBDIR[14:8]
PBDIR[20:22]
PCPAR[4:5]
PCPAR[8:9]
PCPAR[14]
Value
(binary)
X1
X1
0
0
0
0
0
0
MPC875/MPC870 Hardware Specifications, Rev. 3.0
14
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
